Lines Matching refs:VA
1576 CCValAssign &VA = ArgLocs[i];
1577 unsigned Arg = ArgRegs[VA.getValNo()];
1578 MVT ArgVT = ArgVTs[VA.getValNo()];
1585 switch (VA.getLocInfo()) {
1588 bool Emitted = FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(),
1592 ArgVT = VA.getLocVT();
1596 bool Emitted = FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(),
1600 ArgVT = VA.getLocVT();
1604 bool Emitted = FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(),
1607 Emitted = FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(),
1610 Emitted = FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(),
1614 ArgVT = VA.getLocVT();
1618 unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg,
1622 ArgVT = VA.getLocVT();
1629 if (VA.isRegLoc() && !VA.needsCustom()) {
1631 VA.getLocReg())
1633 RegArgs.push_back(VA.getLocReg());
1634 } else if (VA.needsCustom()) {
1636 if (VA.getLocVT() != MVT::f64) return false;
1641 if(!(VA.isRegLoc() && NextVA.isRegLoc())) return false;
1644 TII.get(ARM::VMOVRRD), VA.getLocReg())
1647 RegArgs.push_back(VA.getLocReg());
1650 assert(VA.isMemLoc());
1655 Addr.Offset = VA.getLocMemOffset();
1743 CCValAssign &VA = ValLocs[0];
1747 if (VA.getLocInfo() != CCValAssign::Full)
1750 if (!VA.isRegLoc())
1754 if (TLI.getValueType(RV->getType()) != VA.getValVT())
1758 unsigned SrcReg = Reg + VA.getValNo();
1759 unsigned DstReg = VA.getLocReg();
1768 MRI.addLiveOut(VA.getLocReg());
