Lines Matching refs:DAG
1 //===-- SPUISelLowering.cpp - Cell SPU DAG Lowering Implementation --------===//
53 //! Expand a library call into an actual call DAG node
61 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG,
66 SDValue InChain = DAG.getEntryNode();
72 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
79 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
84 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
89 Callee, Args, DAG, Op.getDebugLoc());
458 // We have target-specific dag combine patterns for the following nodes:
558 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
561 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
568 EVT vecVT = InVT.isVector()? InVT: EVT::getVectorVT(*DAG.getContext(), InVT,
602 rotate = DAG.getConstant(rotamt, MVT::i16);
607 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
609 DAG.getConstant((offset & ~0xf), PtrVT));
620 rotate = DAG.getConstant(rotamt, MVT::i16);
627 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
629 DAG.getConstant(rotamt, PtrVT));
634 MachineFunction &MF = DAG.getMachineFunction();
646 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
647 the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag);
648 basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT);
652 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
655 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
657 DAG.getConstant(0, PtrVT));
662 rotate = DAG.getNode(ISD::ADD, dl, PtrVT,
664 DAG.getConstant(-pso, PtrVT));
668 SDValue low = DAG.getLoad(MVT::i128, dl, the_chain, basePtr,
679 result = DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, MVT::i128,
684 EVT vecVT = EVT::getVectorVT(*DAG.getContext(),
686 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT,
687 DAG.getNode(ISD::BITCAST, dl, vecVT, result));
695 SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32,
696 basePtr, DAG.getConstant( 0xf, MVT::i32 ) );
699 SDValue ones = DAG.getConstant(-1, MVT::v4i32 );
700 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones);
702 SDValue high = DAG.getLoad(MVT::i128, dl, the_chain,
703 DAG.getNode(ISD::ADD, dl, PtrVT,
705 DAG.getConstant(16, PtrVT)),
709 the_chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(1),
715 high = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, high,
716 DAG.getNode(ISD::SUB, dl, MVT::i32,
717 DAG.getConstant( 16, MVT::i32),
723 low = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, low, offset );
726 result = DAG.getNode(ISD::BITCAST, dl, vecVT,
727 DAG.getNode(ISD::OR, dl, MVT::i128, low, high));
730 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT, result );
736 result = DAG.getNode(ISD::SIGN_EXTEND, dl, OutVT, result);
738 result = DAG.getNode(ISD::ZERO_EXTEND, dl, OutVT, result);
745 result = DAG.getNode(NewOpc, dl, OutVT, result);
748 SDVTList retvts = DAG.getVTList(OutVT, MVT::Other);
754 result = DAG.getNode(SPUISD::LDRESULT, dl, retvts,
766 LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
771 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
775 EVT vecVT = StVT.isVector()? StVT: EVT::getVectorVT(*DAG.getContext(), StVT,
807 insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
809 DAG.getConstant((offset & 0xf), PtrVT));
812 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
814 DAG.getConstant((offset & ~0xf), PtrVT));
818 insertEltOffs = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
820 DAG.getConstant(0, PtrVT));
821 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
823 DAG.getConstant(0, PtrVT));
828 MachineFunction &MF = DAG.getMachineFunction();
840 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
841 the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag);
842 basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT);
846 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
849 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
851 DAG.getConstant(0, PtrVT));
855 insertEltOffs = DAG.getNode(ISD::ADD, dl, PtrVT,
857 DAG.getConstant(0, PtrVT));
861 SDValue low = DAG.getLoad(vecVT, dl, the_chain, basePtr,
887 basePtr.getNode()->dump(&DAG);
892 SDValue insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, vecVT,
894 SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT,
897 result = DAG.getNode(SPUISD::SHUFB, dl, vecVT,
899 DAG.getNode(ISD::BITCAST, dl,
902 result = DAG.getStore(the_chain, dl, result, basePtr,
914 SDValue offset = DAG.getNode(ISD::AND, dl, MVT::i32,
916 DAG.getConstant(0xf, MVT::i32));
918 SDValue offset_compl = DAG.getNode(ISD::SUB, dl, MVT::i32,
919 DAG.getConstant( 16, MVT::i32),
922 SDValue surplus = DAG.getNode(ISD::SUB, dl, MVT::i32,
923 DAG.getConstant( 16, MVT::i32),
924 DAG.getConstant( VT.getSizeInBits()/8,
927 SDValue ones = DAG.getConstant(-1, MVT::v4i32);
928 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones);
938 Value = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, Value);
939 lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, ones, surplus);
940 lowmask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask,
942 Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value);
943 Value = DAG.getNode(ISD::AND, dl, MVT::i128, Value, lowmask);
948 Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value);
951 himask = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, lowmask,
953 lowmask = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, lowmask,
958 SDValue hi = DAG.getLoad(MVT::i128, dl, the_chain,
959 DAG.getNode(ISD::ADD, dl, PtrVT, basePtr,
960 DAG.getConstant( 16, PtrVT)),
963 the_chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(1),
966 low = DAG.getNode(ISD::AND, dl, MVT::i128,
967 DAG.getNode( ISD::BITCAST, dl, MVT::i128, low),
968 DAG.getNode( ISD::XOR, dl, MVT::i128, lowmask, ones));
969 hi = DAG.getNode(ISD::AND, dl, MVT::i128,
970 DAG.getNode( ISD::BITCAST, dl, MVT::i128, hi),
971 DAG.getNode( ISD::XOR, dl, MVT::i128, himask, ones));
975 SDValue rlow = DAG.getNode(SPUISD::SRL_BYTES, dl, MVT::i128, Value, offset);
976 rlow = DAG.getNode(ISD::AND, dl, MVT::i128, rlow, lowmask);
977 SDValue rhi = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, Value,
982 rlow = DAG.getNode(ISD::OR, dl, MVT::i128,
983 DAG.getNode(ISD::BITCAST, dl, MVT::i128, low),
984 DAG.getNode(ISD::BITCAST, dl, MVT::i128, rlow));
985 rhi = DAG.getNode(ISD::OR, dl, MVT::i128,
986 DAG.getNode(ISD::BITCAST, dl, MVT::i128, hi),
987 DAG.getNode(ISD::BITCAST, dl, MVT::i128, rhi));
989 low = DAG.getStore(the_chain, dl, rlow, basePtr,
992 hi = DAG.getStore(the_chain, dl, rhi,
993 DAG.getNode(ISD::ADD, dl, PtrVT, basePtr,
994 DAG.getConstant( 16, PtrVT)),
997 result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, low.getValue(0),
1006 LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1010 SDValue CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
1011 SDValue Zero = DAG.getConstant(0, PtrVT);
1012 const TargetMachine &TM = DAG.getTarget();
1019 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, CPI, Zero);
1021 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, CPI, Zero);
1022 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, CPI, Zero);
1023 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1034 SPU::LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUTargetMachine &TM) {
1035 return ::LowerConstantPool(Op, DAG, TM.getSubtargetImpl());
1039 LowerJumpTable(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1042 SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
1043 SDValue Zero = DAG.getConstant(0, PtrVT);
1044 const TargetMachine &TM = DAG.getTarget();
1050 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, JTI, Zero);
1052 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, JTI, Zero);
1053 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, JTI, Zero);
1054 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1064 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
1068 SDValue GA = DAG.getTargetGlobalAddress(GV, Op.getDebugLoc(),
1070 const TargetMachine &TM = DAG.getTarget();
1071 SDValue Zero = DAG.getConstant(0, PtrVT);
1077 return DAG.getNode(SPUISD::AFormAddr, dl, PtrVT, GA, Zero);
1079 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, GA, Zero);
1080 SDValue Lo = DAG.getNode(SPUISD::Lo, dl, PtrVT, GA, Zero);
1081 return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
1094 LowerConstantFP(SDValue Op, SelectionDAG &DAG) {
1106 SDValue T = DAG.getConstant(dbits, MVT::i64);
1107 SDValue Tvec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T);
1108 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
1109 DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Tvec));
1120 DebugLoc dl, SelectionDAG &DAG,
1124 MachineFunction &MF = DAG.getMachineFunction();
1133 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1136 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1137 getTargetMachine(), ArgLocs, *DAG.getContext());
1141 // Add DAG nodes to load the arguments or copy them out of registers.
1188 ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT);
1195 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
1196 ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, MachinePointerInfo(),
1233 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
1235 SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8);
1236 SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, MachinePointerInfo(),
1245 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1254 static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) {
1263 return DAG.getConstant((int)C->getZExtValue() >> 2, MVT::i32).getNode();
1273 DebugLoc dl, SelectionDAG &DAG,
1283 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1284 getTargetMachine(), ArgLocs, *DAG.getContext());
1292 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1297 SDValue StackPtr = DAG.getRegister(SPU::R1, MVT::i32);
1315 SDValue PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
1316 PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
1336 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff,
1351 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumStackBytes,
1356 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1364 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1378 SDValue Zero = DAG.getConstant(0, PtrVT);
1379 SDValue GA = DAG.getTargetGlobalAddress(GV, dl, CalleeVT);
1391 Callee = DAG.getNode(SPUISD::AFormAddr, dl, CalleeVT, GA, Zero);
1393 Callee = DAG.getNode(SPUISD::PCRelAddr, dl, CalleeVT, GA, Zero);
1398 Callee = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, GA, Zero);
1402 SDValue Zero = DAG.getConstant(0, PtrVT);
1403 SDValue ExtSym = DAG.getTargetExternalSymbol(S->getSymbol(),
1407 Callee = DAG.getNode(SPUISD::AFormAddr, dl, CalleeVT, ExtSym, Zero);
1409 Callee = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, ExtSym, Zero);
1411 } else if (SDNode *Dest = isLSAAddress(Callee, DAG)) {
1423 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1429 Chain = DAG.getNode(CallOpc, dl, DAG.getVTList(MVT::Other, MVT::Glue),
1433 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumStackBytes, true),
1434 DAG.getIntPtrConstant(0, true), InFlag);
1444 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1445 getTargetMachine(), RVLocs, *DAG.getContext());
1453 SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
1468 DebugLoc dl, SelectionDAG &DAG) const {
1471 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1472 getTargetMachine(), RVLocs, *DAG.getContext());
1477 if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
1479 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg());
1488 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
1494 return DAG.getNode(SPUISD::RET_FLAG, dl, MVT::Other, Chain, Flag);
1496 return DAG.getNode(SPUISD::RET_FLAG, dl, MVT::Other, Chain);
1529 SDValue SPU::get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
1542 return DAG.getTargetConstant(Value, ValueType);
1551 SDValue SPU::get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
1564 return DAG.getTargetConstant(Value, ValueType);
1574 SDValue SPU::get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
1587 return DAG.getTargetConstant(Value, ValueType);
1600 SDValue SPU::get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
1607 return DAG.getTargetConstant(Value & 0xff, ValueType);
1610 return DAG.getTargetConstant(Value, ValueType);
1619 SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
1626 return DAG.getTargetConstant(Value >> 16, ValueType);
1633 SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
1635 return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i32);
1642 SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
1644 return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i64);
1652 LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) {
1684 SDValue T = DAG.getConstant(Value32, MVT::i32);
1685 return DAG.getNode(ISD::BITCAST, dl, MVT::v4f32,
1686 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, T,T,T,T));
1694 SDValue T = DAG.getConstant(f64val, MVT::i64);
1695 return DAG.getNode(ISD::BITCAST, dl, MVT::v2f64,
1696 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, T, T));
1704 Ops.assign(8, DAG.getConstant(Value16, MVT::i16));
1705 return DAG.getNode(ISD::BITCAST, dl, VT,
1706 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i16, &Ops[0], Ops.size()));
1710 SDValue T = DAG.getConstant(Value16, EltVT);
1714 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
1717 SDValue T = DAG.getConstant(unsigned(SplatBits), VT.getVectorElementType());
1718 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, T, T, T, T);
1721 return SPU::LowerV2I64Splat(VT, DAG, SplatBits, dl);
1731 SPU::LowerV2I64Splat(EVT OpVT, SelectionDAG& DAG, uint64_t SplatVal,
1738 SDValue Val = DAG.getTargetConstant(upper, MVT::i32);
1739 return DAG.getNode(ISD::BITCAST, dl, OpVT,
1740 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1755 SDValue UpperVal = DAG.getConstant(upper, MVT::i32);
1756 SDValue LowerVal = DAG.getConstant(lower, MVT::i32);
1757 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1759 return DAG.getNode(ISD::BITCAST, dl, OpVT, BV);
1769 SDValue LO32C = DAG.getConstant(lower, MVT::i32);
1770 LO32 = DAG.getNode(ISD::BITCAST, dl, OpVT,
1771 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1777 SDValue HI32C = DAG.getConstant(upper, MVT::i32);
1778 HI32 = DAG.getNode(ISD::BITCAST, dl, OpVT,
1779 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1813 ShufBytes.push_back(DAG.getConstant(val, MVT::i32));
1816 return DAG.getNode(SPUISD::SHUFB, dl, OpVT, HI32, LO32,
1817 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
1835 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
1918 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1922 SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
1923 DAG.getRegister(SPU::R1, PtrVT),
1924 DAG.getConstant(V2EltOffset, MVT::i32));
1925 SDValue ShufMaskOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl,
1929 return DAG.getNode(SPUISD::SHUFB, dl, V1.getValueType(), V2, V1,
1935 return DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, V1.getValueType(),
1936 V1, DAG.getConstant(rotamt, MVT::i16));
1947 ResultMask.push_back(DAG.getConstant(SrcElt*BytesPerElement+j,MVT::i8));
1949 SDValue VPermMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8,
1951 return DAG.getNode(SPUISD::SHUFB, dl, V1.getValueType(), V1, V2, VPermMask);
1955 static SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) {
1980 SDValue CValue = DAG.getConstant(CN->getZExtValue(), VT);
1984 return DAG.getNode(ISD::BUILD_VECTOR, dl, Op.getValueType(),
1996 return DAG.getNode(SPUISD::PREFSLOT2VEC, dl, Op.getValueType(), Op0, Op0);
2003 static SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
2026 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, N);
2084 ShufMask[i] = DAG.getConstant(bits, MVT::i32);
2088 DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2091 retval = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
2092 DAG.getNode(SPUISD::SHUFB, dl, N.getValueType(),
2105 Elt = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Elt);
2115 Elt = DAG.getNode(ISD::SHL, dl, MVT::i32, Elt,
2116 DAG.getConstant(scaleShift, MVT::i32));
2119 vecShift = DAG.getNode(SPUISD::SHL_BYTES, dl, VecVT, N, Elt);
2131 SDValue factor = DAG.getConstant(0x00000000, MVT::i32);
2132 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2137 SDValue factor = DAG.getConstant(0x00010001, MVT::i32);
2138 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2144 SDValue factor = DAG.getConstant(0x00010203, MVT::i32);
2145 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2151 SDValue loFactor = DAG.getConstant(0x00010203, MVT::i32);
2152 SDValue hiFactor = DAG.getConstant(0x04050607, MVT::i32);
2153 replicate = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2159 retval = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT,
2160 DAG.getNode(SPUISD::SHUFB, dl, VecVT,
2167 static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
2183 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
2185 SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
2186 DAG.getRegister(SPU::R1, PtrVT),
2187 DAG.getConstant(Offset, PtrVT));
2189 EVT maskVT = EVT::getVectorVT(*(DAG.getContext()), VT.getVectorElementType(),
2191 SDValue ShufMask = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, maskVT, Pointer);
2194 DAG.getNode(SPUISD::SHUFB, dl, VT,
2195 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp),
2197 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, ShufMask));
2202 static SDValue LowerI8Math(SDValue Op, SelectionDAG &DAG, unsigned Opc,
2219 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2220 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2221 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2222 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2230 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2231 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2232 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2233 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2240 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0);
2245 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2250 DAG.getNode(ISD::OR, dl, MVT::i16, N0,
2251 DAG.getNode(ISD::SHL, dl, MVT::i16,
2252 N0, DAG.getConstant(8, MVT::i32)));
2255 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2256 DAG.getNode(Opc, dl, MVT::i16, ExpandArg, N1));
2263 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0);
2270 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2273 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2274 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2280 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2286 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1);
2289 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2290 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2295 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0);
2296 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N1);
2297 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i8,
2298 DAG.getNode(Opc, dl, MVT::i16, N0, N1));
2308 LowerByteImmed(SDValue Op, SelectionDAG &DAG) {
2341 SDValue tc = DAG.getTargetConstant(SplatBits & 0xff, MVT::i8);
2345 return DAG.getNode(Op.getNode()->getOpcode(), dl, VT, Arg,
2346 DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &tcVec[0], tcVec.size()));
2361 static SDValue LowerCTPOP(SDValue Op, SelectionDAG &DAG) {
2363 EVT vecVT = EVT::getVectorVT(*DAG.getContext(),
2372 SDValue Elt0 = DAG.getConstant(0, MVT::i32);
2374 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2375 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2377 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i8, CNTB, Elt0);
2381 MachineFunction &MF = DAG.getMachineFunction();
2387 SDValue Elt0 = DAG.getConstant(0, MVT::i16);
2388 SDValue Mask0 = DAG.getConstant(0x0f, MVT::i16);
2389 SDValue Shift1 = DAG.getConstant(8, MVT::i32);
2391 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2392 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2397 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i16, CNTB, Elt0);
2400 DAG.getCopyToReg(CNTB_result, dl, CNTB_reg, CNTB_result);
2402 SDValue Tmp1 = DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i16);
2404 return DAG.getNode(ISD::AND, dl, MVT::i16,
2405 DAG.getNode(ISD::ADD, dl, MVT::i16,
2406 DAG.getNode(ISD::SRL, dl, MVT::i16,
2413 MachineFunction &MF = DAG.getMachineFunction();
2420 SDValue Elt0 = DAG.getConstant(0, MVT::i32);
2421 SDValue Mask0 = DAG.getConstant(0xff, MVT::i32);
2422 SDValue Shift1 = DAG.getConstant(16, MVT::i32);
2423 SDValue Shift2 = DAG.getConstant(8, MVT::i32);
2425 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N);
2426 SDValue CNTB = DAG.getNode(SPUISD::CNTB, dl, vecVT, Promote);
2431 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, CNTB, Elt0);
2434 DAG.getCopyToReg(CNTB_result, dl, CNTB_reg, CNTB_result);
2437 DAG.getNode(ISD::SRL, dl, MVT::i32,
2438 DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i32),
2442 DAG.getNode(ISD::ADD, dl, MVT::i32, Comp1,
2443 DAG.getCopyFromReg(CNTB_rescopy, dl, CNTB_reg, MVT::i32));
2446 DAG.getCopyToReg(CNTB_result, dl, SUM1_reg, Sum1);
2449 DAG.getNode(ISD::SRL, dl, MVT::i32,
2450 DAG.getCopyFromReg(Sum1_rescopy, dl, SUM1_reg, MVT::i32),
2453 DAG.getNode(ISD::ADD, dl, MVT::i32, Comp2,
2454 DAG.getCopyFromReg(Sum1_rescopy, dl, SUM1_reg, MVT::i32));
2456 return DAG.getNode(ISD::AND, dl, MVT::i32, Sum2, Mask0);
2471 static SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
2486 return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
2497 static SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG,
2512 return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
2522 static SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG,
2539 SDValue i64lhs = DAG.getNode(ISD::BITCAST, dl, IntVT, lhs);
2541 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32,
2542 DAG.getNode(ISD::SRL, dl, IntVT,
2543 DAG.getConstant(32, MVT::i32)));
2545 DAG.getNode(ISD::AND, dl, MVT::i32,
2546 lhsHi32, DAG.getConstant(0x7fffffff, MVT::i32));
2548 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, i64lhs);
2555 return DAG.getNode(ISD::XOR, dl, ccResultVT,
2556 DAG.getSetCC(dl, ccResultVT,
2557 lhs, DAG.getConstantFP(0.0, lhsVT),
2559 DAG.getConstant(ccResultAllOnes, ccResultVT));
2562 return DAG.getNode(ISD::AND, dl, ccResultVT,
2563 DAG.getSetCC(dl, ccResultVT,
2565 DAG.getConstant(0x7ff00000, MVT::i32),
2567 DAG.getSetCC(dl, ccResultVT,
2569 DAG.getConstant(0, MVT::i32),
2573 SDValue i64rhs = DAG.getNode(ISD::BITCAST, dl, IntVT, rhs);
2575 DAG.getNode(ISD::TRUNCATE, dl, MVT::i32,
2576 DAG.getNode(ISD::SRL, dl, IntVT,
2577 i64rhs, DAG.getConstant(32, MVT::i32)));
2580 SDValue signMag2TC = DAG.getConstant(0x8000000000000000ULL, IntVT);
2583 SDValue lhsSelectMask = DAG.getNode(ISD::SRA, dl, ccResultVT,
2584 lhsHi32, DAG.getConstant(31, MVT::i32));
2585 SDValue lhsSignMag2TC = DAG.getNode(ISD::SUB, dl, IntVT, signMag2TC, i64lhs);
2587 DAG.getNode(ISD::SELECT, dl, IntVT,
2590 SDValue rhsSelectMask = DAG.getNode(ISD::SRA, dl, ccResultVT,
2591 rhsHi32, DAG.getConstant(31, MVT::i32));
2592 SDValue rhsSignMag2TC = DAG.getNode(ISD::SUB, dl, IntVT, signMag2TC, i64rhs);
2594 DAG.getNode(ISD::SELECT, dl, IntVT,
2623 DAG.getSetCC(dl, ccResultVT, lhsSelect, rhsSelect,
2628 SDValue lhsNaN = DAG.getSetCC(dl, ccResultVT,
2629 lhs, DAG.getConstantFP(0.0, MVT::f64),
2631 SDValue rhsNaN = DAG.getSetCC(dl, ccResultVT,
2632 rhs, DAG.getConstantFP(0.0, MVT::f64),
2634 SDValue ordered = DAG.getNode(ISD::AND, dl, ccResultVT, lhsNaN, rhsNaN);
2636 result = DAG.getNode(ISD::AND, dl, ccResultVT, ordered, result);
2654 static SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG,
2675 SDValue compare = DAG.getNode(ISD::SETCC, dl,
2678 return DAG.getNode(SPUISD::SELB, dl, VT, falseval, trueval, compare);
2682 static SDValue LowerTRUNCATE(SDValue Op, SelectionDAG &DAG)
2687 EVT VecVT = EVT::getVectorVT(*DAG.getContext(),
2700 SDValue shufMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2701 DAG.getConstant(maskHigh, MVT::i32),
2702 DAG.getConstant(maskLow, MVT::i32),
2703 DAG.getConstant(maskHigh, MVT::i32),
2704 DAG.getConstant(maskLow, MVT::i32));
2706 SDValue truncShuffle = DAG.getNode(SPUISD::SHUFB, dl, VecVT,
2709 return DAG.getNode(SPUISD::VEC2PREFSLOT, dl, VT, truncShuffle);
2722 * @param DAG The current DAG
2725 static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG)
2738 Op0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, Op0);
2752 SDValue shufMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
2753 DAG.getConstant(mask1, MVT::i32),
2754 DAG.getConstant(mask1, MVT::i32),
2755 DAG.getConstant(mask2, MVT::i32),
2756 DAG.getConstant(mask3, MVT::i32));
2761 SDValue sraVal = DAG.getNode(ISD::SRA,
2764 DAG.getNode(SPUISD::PREFSLOT2VEC, dl, mvt, Op0, Op0),
2765 DAG.getConstant(31, MVT::i32));
2768 SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
2770 DAG.getTargetConstant(
2775 SDValue extShuffle = DAG.getNode(SPUISD::SHUFB, dl, mvt,
2777 return DAG.getNode(ISD::BITCAST, dl, MVT::i128, extShuffle);
2782 This is where LLVM's DAG selection process calls to do target-specific
2786 SPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
2805 return LowerLOAD(Op, DAG, SPUTM.getSubtargetImpl());
2807 return LowerSTORE(Op, DAG, SPUTM.getSubtargetImpl());
2809 return LowerConstantPool(Op, DAG, SPUTM.getSubtargetImpl());
2811 return LowerGlobalAddress(Op, DAG, SPUTM.getSubtargetImpl());
2813 return LowerJumpTable(Op, DAG, SPUTM.getSubtargetImpl());
2815 return LowerConstantFP(Op, DAG);
2826 return LowerI8Math(Op, DAG, Opc, *this);
2832 return LowerFP_TO_INT(Op, DAG, *this);
2836 return LowerINT_TO_FP(Op, DAG, *this);
2840 return LowerBUILD_VECTOR(Op, DAG);
2842 return LowerSCALAR_TO_VECTOR(Op, DAG);
2844 return LowerVECTOR_SHUFFLE(Op, DAG);
2846 return LowerEXTRACT_VECTOR_ELT(Op, DAG);
2848 return LowerINSERT_VECTOR_ELT(Op, DAG);
2854 return LowerByteImmed(Op, DAG);
2859 return LowerI8Math(Op, DAG, Opc, *this);
2862 return LowerCTPOP(Op, DAG);
2865 return LowerSELECT_CC(Op, DAG, *this);
2868 return LowerSETCC(Op, DAG, *this);
2871 return LowerTRUNCATE(Op, DAG);
2874 return LowerSIGN_EXTEND(Op, DAG);
2882 SelectionDAG &DAG) const
2914 SelectionDAG &DAG = DCI.DAG;
2958 SDValue combinedValue = DAG.getConstant(combinedConst, Op0VT);
2970 return DAG.getNode(SPUISD::IndirectAddr, dl, Op0VT,
2987 N->dump(&DAG);
2989 Op0.getNode()->dump(&DAG);
3006 DEBUG(N->dump(&DAG));
3008 DEBUG(Op0.getNode()->dump(&DAG));
3028 return DAG.getNode(SPUISD::IndirectAddr, dl, Op0VT,
3082 DEBUG(N->dump(&DAG));
3084 DEBUG(Result.getNode()->dump(&DAG));
3178 const SelectionDAG &DAG,
3228 SelectionDAG &DAG) const {
3230 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
