Lines Matching defs:Opcode
86 /// rotate and mask opcode and mask operation.
143 /// Reg in an asm, because the load or store opcode would have to change.
303 // opcode and that it has a immediate integer right operand.
341 unsigned Opcode = N->getOpcode();
346 if (Opcode == ISD::SHL) {
351 } else if (Opcode == ISD::SRL) {
358 } else if (Opcode == ISD::ROTL) {
890 unsigned Opcode;
897 case MVT::f64: Opcode = PPC::LFDU; break;
898 case MVT::f32: Opcode = PPC::LFSU; break;
899 case MVT::i32: Opcode = PPC::LWZU; break;
900 case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break;
902 case MVT::i8: Opcode = PPC::LBZU; break;
909 case MVT::i64: Opcode = PPC::LDU; break;
910 case MVT::i32: Opcode = PPC::LWZU8; break;
911 case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break;
913 case MVT::i8: Opcode = PPC::LBZU8; break;
921 return CurDAG->getMachineNode(Opcode, dl, LD->getValueType(0),
