Lines Matching refs:Disp
48 int64_t Disp;
52 : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) {
72 errs() << " Disp " << Disp << '\n';
86 SDValue &Base, SDValue &Disp);
88 SDValue &Base, SDValue &Disp,
124 SDValue &Base, SDValue &Disp);
126 SDValue &Base, SDValue &Disp,
128 bool SelectAddrRI(SDValue& Addr, SDValue &Base, SDValue &Disp);
130 SDValue &Base, SDValue &Disp, SDValue &Index);
132 SDValue &Base, SDValue &Disp, SDValue &Index);
134 SDValue &Base, SDValue &Disp, SDValue &Index);
139 SDValue &Base, SDValue &Disp, SDValue &Index);
199 isImmZExt12(AM.Disp + Val, Imm) :
200 isImmSExt20(AM.Disp + Val, Imm));
202 AM.Disp = Imm;
296 isImmZExt12(AM.Disp + Offset, Imm) :
297 isImmSExt20(AM.Disp + Offset, Imm));
298 // The resultant disp must fit in 12 or 20-bits.
304 AM.Disp = Imm;
338 SDValue &Base, SDValue &Disp) {
343 Disp = CurDAG->getTargetConstant(AM.Disp, MVT::i64);
347 SDValue &Base, SDValue &Disp,
349 getAddressOperandsRI(AM, Base, Disp);
356 SDValue &Base, SDValue &Disp) {
357 return SelectAddrRI12(Addr, Base, Disp, /*is12BitOnly*/true);
361 SDValue &Base, SDValue &Disp,
390 if (AM12.Disp == 0 && AM20.Disp != 0)
403 getAddressOperandsRI(AM12, Base, Disp);
411 SDValue &Base, SDValue &Disp) {
446 getAddressOperandsRI(AM, Base, Disp);
454 SDValue &Base, SDValue &Disp, SDValue &Index) {
481 if (AM12.Disp == 0 && AM20.Disp != 0)
495 getAddressOperands(AM12, Base, Disp, Index);
503 SDValue &Base, SDValue &Disp, SDValue &Index) {
539 getAddressOperands(AM, Base, Disp, Index);
547 SDValue &Base, SDValue &Disp, SDValue &Index) {
568 if (AM.Disp && (AM.Base.Reg.getNode() || AM.IndexReg.getNode()))
572 getAddressOperands(AM, Base, Disp, Index);
580 SDValue &Base, SDValue &Disp, SDValue &Index) {
583 return SelectAddrRRI20(N.getOperand(1), Base, Disp, Index);
