Lines Matching full:x86
1 //===- X86Disassembler.cpp - Disassembler for x86 and x86_64 ----*- C++ -*-===//
10 // This file is part of the X86 Disassembler.
52 namespace X86 {
153 #define ENTRY(x) X86::x,
195 // By default sign-extend all X86 immediates based on their encoding.
203 // Special case those X86 instructions that use the imm8 as a set of
205 if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri &&
206 Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri &&
207 Opcode != X86::DPPSrri && Opcode != X86::DPPDrri &&
208 Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri &&
209 Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri &&
210 Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri &&
211 Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri &&
212 Opcode != X86::VDPPSYrmi && Opcode != X86::VDPPDrri &&
213 Opcode != X86::VINSERTPSrr)
230 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
233 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4)));
287 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break;
330 baseReg = MCOperand::CreateReg(X86::x); break;
345 indexReg = MCOperand::CreateReg(X86::x); break;
363 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
370 baseReg = MCOperand::CreateReg(X86::BX);
371 indexReg = MCOperand::CreateReg(X86::SI);
374 baseReg = MCOperand::CreateReg(X86::BX);
375 indexReg = MCOperand::CreateReg(X86::DI);
378 baseReg = MCOperand::CreateReg(X86::BP);
379 indexReg = MCOperand::CreateReg(X86::SI);
382 baseReg = MCOperand::CreateReg(X86::BP);
383 indexReg = MCOperand::CreateReg(X86::DI);
397 baseReg = MCOperand::CreateReg(X86::x); break;
416 X86::CS,
417 X86::SS,
418 X86::DS,
419 X86::ES,
420 X86::FS,
421 X86::GS
500 mcInst.addOperand(MCOperand::CreateReg(X86::ST0 + stackPos));
