Lines Matching full:pseudo
10 // This file describes the various pseudo instructions used by the compiler,
30 // Random Pseudo Instructions.
36 def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
46 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs), (ins i32imm:$amt),
50 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
62 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs), (ins i32imm:$amt),
66 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
76 def VASTART_SAVE_XMM_REGS : I<0, Pseudo,
86 // The VAARG_64 pseudo-instruction takes the address of the va_list,
89 def VAARG_64 : I<0, Pseudo,
106 def WIN_ALLOCA : I<0, Pseudo, (outs), (ins),
116 def SEG_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size),
123 def SEG_ALLOCA_64 : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$size),
134 // EH Pseudo Instructions
158 // FIXME: Set encoding to pseudo.
173 // FIXME: Set encoding to pseudo.
199 // FIXME: These are pseudo ops that should be replaced with Pat<> patterns.
202 // FIXME: Change these to have encoding Pseudo when X86MCCodeEmitter replaces
262 // String Pseudo Instructions
307 def TLS_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
321 def TLS_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
333 def TLSCall_32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
343 def TLSCall_64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
350 // Conditional Move Pseudo Instructions
357 def CMOV_GR8 : I<0, Pseudo,
359 "#CMOV_GR8 PSEUDO!",
364 def CMOV_GR32 : I<0, Pseudo,
366 "#CMOV_GR32* PSEUDO!",
369 def CMOV_GR16 : I<0, Pseudo,
371 "#CMOV_GR16* PSEUDO!",
374 def CMOV_RFP32 : I<0, Pseudo,
377 "#CMOV_RFP32 PSEUDO!",
381 def CMOV_RFP64 : I<0, Pseudo,
384 "#CMOV_RFP64 PSEUDO!",
388 def CMOV_RFP80 : I<0, Pseudo,
391 "#CMOV_RFP80 PSEUDO!",
400 // Atomic Instruction Pseudo Instructions
407 def ATOMAND8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
408 "#ATOMAND8 PSEUDO!",
410 def ATOMOR8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
411 "#ATOMOR8 PSEUDO!",
413 def ATOMXOR8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
414 "#ATOMXOR8 PSEUDO!",
416 def ATOMNAND8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
417 "#ATOMNAND8 PSEUDO!",
420 def ATOMAND16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
421 "#ATOMAND16 PSEUDO!",
423 def ATOMOR16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
424 "#ATOMOR16 PSEUDO!",
426 def ATOMXOR16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
427 "#ATOMXOR16 PSEUDO!",
429 def ATOMNAND16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
430 "#ATOMNAND16 PSEUDO!",
432 def ATOMMIN16: I<0, Pseudo, (outs GR16:$dst), (ins i16mem:$ptr, GR16:$val),
433 "#ATOMMIN16 PSEUDO!",
435 def ATOMMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
436 "#ATOMMAX16 PSEUDO!",
438 def ATOMUMIN16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
439 "#ATOMUMIN16 PSEUDO!",
441 def ATOMUMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
442 "#ATOMUMAX16 PSEUDO!",
446 def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
447 "#ATOMAND32 PSEUDO!",
449 def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
450 "#ATOMOR32 PSEUDO!",
452 def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
453 "#ATOMXOR32 PSEUDO!",
455 def ATOMNAND32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
456 "#ATOMNAND32 PSEUDO!",
458 def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
459 "#ATOMMIN32 PSEUDO!",
461 def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
462 "#ATOMMAX32 PSEUDO!",
464 def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
465 "#ATOMUMIN32 PSEUDO!",
467 def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
468 "#ATOMUMAX32 PSEUDO!",
473 def ATOMAND64 : I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
474 "#ATOMAND64 PSEUDO!",
476 def ATOMOR64 : I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
477 "#ATOMOR64 PSEUDO!",
479 def ATOMXOR64 : I<0, Pseudo,(outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
480 "#ATOMXOR64 PSEUDO!",
482 def ATOMNAND64 : I<0, Pseudo,(outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
483 "#ATOMNAND64 PSEUDO!",
485 def ATOMMIN64: I<0, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val),
486 "#ATOMMIN64 PSEUDO!",
488 def ATOMMAX64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
489 "#ATOMMAX64 PSEUDO!",
491 def ATOMUMIN64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
492 "#ATOMUMIN64 PSEUDO!",
494 def ATOMUMAX64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
495 "#ATOMUMAX64 PSEUDO!",
504 def ATOMAND6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
506 "#ATOMAND6432 PSEUDO!", []>;
507 def ATOMOR6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
509 "#ATOMOR6432 PSEUDO!", []>;
510 def ATOMXOR6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
512 "#ATOMXOR6432 PSEUDO!", []>;
513 def ATOMNAND6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
515 "#ATOMNAND6432 PSEUDO!", []>;
516 def ATOMADD6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
518 "#ATOMADD6432 PSEUDO!", []>;
519 def ATOMSUB6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
521 "#ATOMSUB6432 PSEUDO!", []>;
522 def ATOMSWAP6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
524 "#ATOMSWAP6432 PSEUDO!", []>;
528 // Normal-Instructions-With-Lock-Prefix Pseudo Instructions
543 def Int_MemBarrier : I<0, Pseudo, (outs), (ins),
744 def ACQUIRE_MOV8rm : I<0, Pseudo, (outs GR8 :$dst), (ins i8mem :$src),
745 "#ACQUIRE_MOV PSEUDO!",
747 def ACQUIRE_MOV16rm : I<0, Pseudo, (outs GR16:$dst), (ins i16mem:$src),
748 "#ACQUIRE_MOV PSEUDO!",
750 def ACQUIRE_MOV32rm : I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$src),
751 "#ACQUIRE_MOV PSEUDO!",
753 def ACQUIRE_MOV64rm : I<0, Pseudo, (outs GR64:$dst), (ins i64mem:$src),
754 "#ACQUIRE_MOV PSEUDO!",
757 def RELEASE_MOV8mr : I<0, Pseudo, (outs), (ins i8mem :$dst, GR8 :$src),
758 "#RELEASE_MOV PSEUDO!",
760 def RELEASE_MOV16mr : I<0, Pseudo, (outs), (ins i16mem:$dst, GR16:$src),
761 "#RELEASE_MOV PSEUDO!",
763 def RELEASE_MOV32mr : I<0, Pseudo, (outs), (ins i32mem:$dst, GR32:$src),
764 "#RELEASE_MOV PSEUDO!",
766 def RELEASE_MOV64mr : I<0, Pseudo, (outs), (ins i64mem:$dst, GR64:$src),
767 "#RELEASE_MOV PSEUDO!",
771 // Conditional Move Pseudo Instructions.
778 def CMOV_FR32 : I<0, Pseudo,
780 "#CMOV_FR32 PSEUDO!",
783 def CMOV_FR64 : I<0, Pseudo,
785 "#CMOV_FR64 PSEUDO!",
788 def CMOV_V4F32 : I<0, Pseudo,
790 "#CMOV_V4F32 PSEUDO!",
794 def CMOV_V2F64 : I<0, Pseudo,
796 "#CMOV_V2F64 PSEUDO!",
800 def CMOV_V2I64 : I<0, Pseudo,
802 "#CMOV_V2I64 PSEUDO!",
806 def CMOV_V8F32 : I<0, Pseudo,
808 "#CMOV_V8F32 PSEUDO!",
812 def CMOV_V4F64 : I<0, Pseudo,
814 "#CMOV_V4F64 PSEUDO!",
818 def CMOV_V4I64 : I<0, Pseudo,
820 "#CMOV_V4I64 PSEUDO!",
1101 // into "disjoint bits" pseudo ops.
1124 def ADD16rr_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1127 def ADD32rr_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
1130 def ADD64rr_DB : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
1138 def ADD16ri8_DB : I<0, Pseudo,
1142 def ADD16ri_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
1146 def ADD32ri8_DB : I<0, Pseudo,
1150 def ADD32ri_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
1155 def ADD64ri8_DB : I<0, Pseudo,
1160 def ADD64ri32_DB : I<0, Pseudo,
