Lines Matching full:i64
61 define <1 x i64> @vpaddls32(<2 x i32>* %A) nounwind {
65 %tmp2 = call <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32> %tmp1)
66 ret <1 x i64> %tmp2
85 define <1 x i64> @vpaddlu32(<2 x i32>* %A) nounwind {
89 %tmp2 = call <1 x i64> @llvm.arm.neon.vpaddlu.v1i64.v2i32(<2 x i32> %tmp1)
90 ret <1 x i64> %tmp2
109 define <2 x i64> @vpaddlQs32(<4 x i32>* %A) nounwind {
113 %tmp2 = call <2 x i64> @llvm.arm.neon.vpaddls.v2i64.v4i32(<4 x i32> %tmp1)
114 ret <2 x i64> %tmp2
133 define <2 x i64> @vpaddlQu32(<4 x i32>* %A) nounwind {
137 %tmp2 = call <2 x i64> @llvm.arm.neon.vpaddlu.v2i64.v4i32(<4 x i32> %tmp1)
138 ret <2 x i64> %tmp2
157 declare <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32>) nounwind readnone
161 declare <1 x i64> @llvm.arm.neon.vpaddlu.v1i64.v2i32(<2 x i32>) nounwind readnone
165 declare <2 x i64> @llvm.arm.neon.vpaddls.v2i64.v4i32(<4 x i32>) nounwind readnone
169 declare <2 x i64> @llvm.arm.neon.vpaddlu.v2i64.v4i32(<4 x i32>) nounwind readnone
