Lines Matching full:x40
831 #define SetZF(x) x.u.r8.flagsl |= 0x40
1050 { 0x1071, 0x1051, 0x1011, 0x1000, 0x40 }, /* Q */
1051 { 0x1177, 0x1157, 0x1117, 0x1100, 0x40 }, /* W */
1052 { 0x1265, 0x1245, 0x1205, 0x1200, 0x40 }, /* E */
1053 { 0x1372, 0x1352, 0x1312, 0x1300, 0x40 }, /* R */
1054 { 0x1474, 0x1454, 0x1414, 0x1400, 0x40 }, /* T */
1055 { 0x1579, 0x1559, 0x1519, 0x1500, 0x40 }, /* Y */
1056 { 0x1675, 0x1655, 0x1615, 0x1600, 0x40 }, /* U */
1057 { 0x1769, 0x1749, 0x1709, 0x1700, 0x40 }, /* I */
1058 { 0x186f, 0x184f, 0x180f, 0x1800, 0x40 }, /* O */
1059 { 0x1970, 0x1950, 0x1910, 0x1900, 0x40 }, /* P */
1064 { 0x1e61, 0x1e41, 0x1e01, 0x1e00, 0x40 }, /* A */
1065 { 0x1f73, 0x1f53, 0x1f13, 0x1f00, 0x40 }, /* S */
1066 { 0x2064, 0x2044, 0x2004, 0x2000, 0x40 }, /* D */
1067 { 0x2166, 0x2146, 0x2106, 0x2100, 0x40 }, /* F */
1068 { 0x2267, 0x2247, 0x2207, 0x2200, 0x40 }, /* G */
1069 { 0x2368, 0x2348, 0x2308, 0x2300, 0x40 }, /* H */
1070 { 0x246a, 0x244a, 0x240a, 0x2400, 0x40 }, /* J */
1071 { 0x256b, 0x254b, 0x250b, 0x2500, 0x40 }, /* K */
1072 { 0x266c, 0x264c, 0x260c, 0x2600, 0x40 }, /* L */
1078 { 0x2c7a, 0x2c5a, 0x2c1a, 0x2c00, 0x40 }, /* Z */
1079 { 0x2d78, 0x2d58, 0x2d18, 0x2d00, 0x40 }, /* X */
1080 { 0x2e63, 0x2e43, 0x2e03, 0x2e00, 0x40 }, /* C */
1081 { 0x2f76, 0x2f56, 0x2f16, 0x2f00, 0x40 }, /* V */
1082 { 0x3062, 0x3042, 0x3002, 0x3000, 0x40 }, /* B */
1083 { 0x316e, 0x314e, 0x310e, 0x3100, 0x40 }, /* N */
1084 { 0x326d, 0x324d, 0x320d, 0x3200, 0x40 }, /* M */
1422 while (!(inb(base_port + UART_LSR) & 0x40));
1846 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x40);
2212 s3_resume_flag = read_byte(0x40, 0xb0);
2213 s3_wakeup_vector = read_dword(0x40, 0xb2);
2219 write_byte(0x40, 0xb0, 0);
2222 write_word(0x40, 0xb6, (s3_wakeup_vector & 0xF)); /* IP */
2223 write_word(0x40, 0xb8, (s3_wakeup_vector >> 4)); /* CS */
2257 #define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
2280 #define ATA_CB_DH_LBA 0x40 // use LBA
2284 #define ATA_CB_STAT_RDY 0x40 // ready
2328 #define ATA_CMD_READ_VERIFY_SECTORS 0x40
2768 write_byte(0x40,0x75, hdcount);
3720 write_byte(0x40,0x10,read_byte(0x40,0x10)|0x41);
3885 if( ( read_byte( 0x40, 0xA0 ) & 1 ) == 0 ) {
3887 write_byte( 0x40, 0xA0, 1 ); // Set status byte.
3888 write_word( 0x40, 0x98, ES ); // Byte location, segment
3889 write_word( 0x40, 0x9A, regs.u.r16.bx ); // Byte location, offset
3890 write_word( 0x40, 0x9C, regs.u.r16.dx ); // Low word, delay
3891 write_word( 0x40, 0x9E, regs.u.r16.cx ); // High word, delay.
3896 outb_cmos( 0xB, bRegister | 0x40 ); // Turn on the Periodic Interrupt timer
3905 write_byte( 0x40, 0xA0, 0 ); // Clear status byte
3908 outb_cmos( 0xB, bRegister & ~0x40 ); // Turn off the Periodic Interrupt timer
4971 shift_flags ^= 0x40;
4973 mf2_flags |= 0x40;
4977 mf2_flags &= ~0x40;
6494 if ( (status & 0xc9) != 0x40 )
6634 if ( (status & 0xe9) != 0x40 )
6748 if ( (status & 0xc0) == 0x40 ) {
6914 write_byte(0x40,0x40, BX_FLOPPY_ON_CNT);
7954 while (((inb(addr+1) & 0x40) == 0x40) && (timeout)) {
8382 if( ( registerC & 0x40 ) != 0 ) {
8385 if( read_byte( 0x40, 0xA0 ) != 0 ) {
8389 time = read_dword( 0x40, 0x9C ); // Time left in microseconds.
8394 segment = read_word( 0x40, 0x98 );
8395 offset = read_word( 0x40, 0x9A );
8396 write_byte( 0x40, 0xA0, 0 ); // Turn of status byte.
8402 write_dword( 0x40, 0x9C, time );
8751 SET_INT_VECTOR(0x40, #0xF000, #int13_diskette)
9087 ;- POST: EOI + jmp via [0x40:67)
10393 ;; 0x05 = eoi + jmp via [0x40:0x67] jump
10397 ;; 0x0A = jmp via [0x40:0x67] jump
10401 ;; 0x0B = iret via [0x40:0x67]
10405 ;; 0x0C = retf via [0x40:0x67]
10514 out 0x40, al
10515 out 0x40, al
10820 or BYTE [bp + 0x06], #0x40
