Lines Matching full:mmx
4 * For Intel/AMD x86 or x86-64 CPU (Pentium-MMX or later) and GNU C compiler.
20 * [Intel's performance analysis of the MMX vs. non-MMX code;
50 * - fixed sign error in post-MMX cleanup code (16- & 32-bit cases)
54 * x [DONE] write MMX code for 64-bit case (pixel_bytes == 8) [not tested]
55 * - write MMX code for 48-bit case (pixel_bytes == 6)
61 * - rewrite all MMX interlacing code so it's aligned with
69 * but there are enough unused MMX registers in every case,
71 * post-MMX cleanup code (C code) in at least some of the
74 * inconsistent, and don't match the MMX Programmer's Reference
92 * inlining (png_do_read_interlace() "non-MMX/modified C code" block)
95 * - fixed png_combine_row() non-MMX replication bug (odd passes only?)
133 * - fixed a register-name typo in png_do_read_interlace(), default (MMX) case,
159 * MMX routine); began converting png_read_filter_row_mmx_sub()
213 * modified other MMX routines to run conditionally (png_ptr->asm_flags)
221 * within MMX version of png_read_filter_row()) so no longer necessary to
225 * - fixed buffer-overrun bug in png_combine_row() C code (non-MMX)
278 * supports MMX regs (%mm0, etc.) in clobber list (not supported by gcc
419 * - write MMX code for 48-bit case (pixel_bytes == 6)
423 * - rewrite all MMX interlacing code so it's aligned with beginning
430 * funcs), read (asm/MMX), recompute CRCs, and compare?
504 /* These constants are used in the inlined MMX assembly code. */
832 static int _mmx_supported = 2; // 0: no MMX; 1: MMX supported; 2: not tested
900 "jl 0f \n\t" // if eax is zero, MMX is not supported
906 "andl $0x800000, %%edx \n\t" // mask out all bits but MMX bit (23)
907 "cmpl $0, %%edx \n\t" // 0 = MMX not supported
908 "jz 0f \n\t" // non-zero = yes, MMX IS supported
911 "jmp 1f \n\t" // DONE: have MMX support
926 // "ret \n\t" // DONE: no MMX support
966 /* Use this routine for the x86 platform - it uses a faster MMX routine
967 if the machine supports MMX. */
3079 else if (pixel_bytes == BPP6) // why no MMX for this case?
3107 else /* MMX not supported: use modified C code - takes advantage
3214 } /* end if (MMX not supported) */
3478 { // but loop uses all 8 MMX regs, and psrlq/psllq require 64-bit
3479 // mem (PIC/.so problems), MMX reg (none left), or immediate
3934 // MMX acceleration complete; now do clean-up
3937 //pre "movl MMXLength, %%eax \n\t" // eax: x == offset bytes after MMX
3970 "EMMS \n\t" // end MMX; prep for poss. FP instrs.
4986 // MMX acceleration complete; now do clean-up
5082 "EMMS \n\t" // end MMX; prep for poss. FP instrs.
5258 // into unused MMX regs via ecx/edx, but kludgy)
5579 "EMMS \n\t" // end MMX instructions
5654 // unrolled loop - use all MMX registers and interleave to reduce
5704 "up_lpA: \n\t" // use MMX regs to update 8 bytes sim.
5796 ? "MMX" :
5811 ? "MMX" :
5826 ? "MMX" :
5842 ? "MMX" :
