Lines Matching full:cpu_m0
92 static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
1189 iwmmxt_store_reg(cpu_M0, rn);
1194 iwmmxt_load_reg(cpu_M0, rn);
1200 tcg_gen_or_i64(cpu_M0, cpu_M0, cpu_V1);
1206 tcg_gen_and_i64(cpu_M0, cpu_M0, cpu_V1);
1212 tcg_gen_xor_i64(cpu_M0, cpu_M0, cpu_V1);
1219 gen_helper_iwmmxt_##name(cpu_M0, cpu_M0, cpu_V1); \
1230 gen_helper_iwmmxt_##name(cpu_M0, cpu_M0); \
1309 gen_helper_iwmmxt_setpsr_nz(tmp, cpu_M0);
1317 tcg_gen_add_i64(cpu_M0, cpu_M0, cpu_V1);
1418 tcg_gen_qemu_ld64(cpu_M0, addr, IS_USER(s));
1431 tcg_gen_extu_i32_i64(cpu_M0, tmp);
1446 tcg_gen_qemu_st64(cpu_M0, addr, IS_USER(s));
1448 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1453 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1456 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1536 tcg_gen_neg_i64(cpu_M0, cpu_M0);
1654 tcg_gen_add_i64(cpu_M0, cpu_M0, cpu_V1);
1709 gen_helper_iwmmxt_align(cpu_M0, cpu_M0, cpu_V1, tmp);
1738 gen_helper_iwmmxt_insr(cpu_M0, cpu_M0, tmp, tmp2, tmp3);
1754 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 7) << 3);
1755 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1763 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 3) << 4);
1764 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1772 tcg_gen_shri_i64(cpu_M0, cpu_M0, (insn & 1) << 5);
1773 tcg_gen_trunc_i64_i32(tmp, cpu_M0);
1805 gen_helper_iwmmxt_bcstb(cpu_M0, tmp);
1808 gen_helper_iwmmxt_bcstw(cpu_M0, tmp);
1811 gen_helper_iwmmxt_bcstl(cpu_M0, tmp);
1852 gen_helper_iwmmxt_addcb(cpu_M0, cpu_M0);
1855 gen_helper_iwmmxt_addcw(cpu_M0, cpu_M0);
1858 gen_helper_iwmmxt_addcl(cpu_M0, cpu_M0);
1903 gen_helper_iwmmxt_msbb(tmp, cpu_M0);
1906 gen_helper_iwmmxt_msbw(tmp, cpu_M0);
1909 gen_helper_iwmmxt_msbl(tmp, cpu_M0);
2022 gen_helper_iwmmxt_srlw(cpu_M0, cpu_M0, tmp);
2025 gen_helper_iwmmxt_srll(cpu_M0, cpu_M0, tmp);
2028 gen_helper_iwmmxt_srlq(cpu_M0, cpu_M0, tmp);
2050 gen_helper_iwmmxt_sraw(cpu_M0, cpu_M0, tmp);
2053 gen_helper_iwmmxt_sral(cpu_M0, cpu_M0, tmp);
2056 gen_helper_iwmmxt_sraq(cpu_M0, cpu_M0, tmp);
2078 gen_helper_iwmmxt_sllw(cpu_M0, cpu_M0, tmp);
2081 gen_helper_iwmmxt_slll(cpu_M0, cpu_M0, tmp);
2084 gen_helper_iwmmxt_sllq(cpu_M0, cpu_M0, tmp);
2106 gen_helper_iwmmxt_rorw(cpu_M0, cpu_M0, tmp);
2113 gen_helper_iwmmxt_rorl(cpu_M0, cpu_M0, tmp);
2120 gen_helper_iwmmxt_rorq(cpu_M0, cpu_M0, tmp);
2198 gen_helper_iwmmxt_align(cpu_M0, cpu_M0, cpu_V1, tmp);
2254 gen_helper_iwmmxt_shufh(cpu_M0, cpu_M0, tmp);
2351 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2);
2354 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2);
2361 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2);
2400 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2);
2403 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2);
2413 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2);
9582 /* FIXME: cpu_M0 can probably be the same as cpu_V0. */
9583 cpu_M0 = tcg_temp_new_i64();
