Lines Matching full:live
233 // We cannot spill a live range that has a use requiring a register
319 // Partition original use intervals to the two live ranges.
347 // Partition original use positions to the two live ranges.
355 // Link the new live range in the chain before any of the other
368 // This implements an ordering on live ranges so that they are ordered by their
370 // allocation algorithm. If two live ranges start at the same offset then there
388 LAllocator::TraceAlloc("Shorten live range %d to [%d\n", id_, start.Value());
397 LAllocator::TraceAlloc("Ensure live range %d in interval [%d %d[\n",
420 LAllocator::TraceAlloc("Add to live range %d interval [%d %d[\n",
449 LAllocator::TraceAlloc("Add to live range %d use position %d\n",
563 // Compute live out for the given block, except not including backward
570 // Add values live on entry to the successor. Note the successor's
575 // All phi input operands corresponding to this successor edge are live
598 // Add an interval that includes the entire block to the live range for
824 // and splitting of live ranges do not account for it.
843 // The live range of writable input registers always goes until the end
892 void LAllocator::ProcessInstructions(HBasicBlock* block, BitVector* live) {
922 if (live->Contains(to->VirtualRegister())) {
924 live->Remove(to->VirtualRegister());
935 live->Add(from->VirtualRegister());
945 if (output->IsUnallocated()) live->Remove(output->VirtualRegister());
983 if (input->IsUnallocated()) live->Add(input->VirtualRegister());
1121 // it into a location different from the operand of a live range
1167 // Add gap move if the two live ranges touch and there is no block
1202 BitVector* live = live_in_sets_[block->block_id()];
1203 BitVector::Iterator iterator(live);
1218 HPhase phase("Build live ranges", this);
1224 BitVector* live = ComputeLiveOut(block);
1225 // Initially consider all live_out values live for the entire block. We
1227 AddInitialIntervals(block, live);
1230 // live values.
1231 ProcessInstructions(block, live);
1235 // The live range interval already ends at the first instruction of the
1238 live->Remove(phi->id());
1259 // Now live is live_in for this block except not including values live
1261 live_in_sets_[block_id] = live;
1267 // in the loop information. Add a live range stretching from the first
1268 // loop instruction to the last for each value live on entry to the
1271 BitVector::Iterator iterator(live);
1284 live_in_sets_[i]->Union(*live);
1290 BitVector::Iterator iterator(live);
1328 // for all spilled live ranges at this point.
1334 // Iterate over the first parts of multi-part live ranges.
1338 // Skip empty live ranges.
1387 // Check if the live range is spilled and the safe point is after
1500 TraceAlloc("Live range %d already has a spill operand\n", current->id());
1513 // Do not spill live range eagerly if use position that can benefit from
1514 // the register is too close to the start of live range.
1525 --i; // The live range was removed from the list of active live ranges.
1528 --i; // The live range was removed from the list of active live ranges.
1536 --i; // Live range was removed from the list of inactive live ranges.
1539 --i; // Live range was removed from the list of inactive live ranges.
1627 TraceAlloc("Add live range %d to active\n", range->id());
1633 TraceAlloc("Add live range %d to inactive\n", range->id());
1644 TraceAlloc("Add live range %d to unhandled at %d\n", range->id(), i + 1);
1650 TraceAlloc("Add live range %d to unhandled at start\n", range->id());
1659 TraceAlloc("Add live range %d to unhandled unsorted at end\n", range->id());
1673 // Sort the unhandled live ranges so that the ranges to be processed first are
1721 TraceAlloc("Moving live range %d from active to handled\n", range->id());
1730 TraceAlloc("Moving live range %d from active to inactive\n", range->id());
1737 TraceAlloc("Moving live range %d from inactive to handled\n", range->id());
1746 TraceAlloc("Moving live range %d from inactive to active\n", range->id());
1785 "Found reg hint %s (free until [%d) for live range %d (end %d[).\n",
1791 // The desired register is free until the end of the current live range.
1793 TraceAlloc("Assigning preferred reg %s to live range %d\n",
1828 TraceAlloc("Assigning free reg %s to live range %d\n",
1840 // There is no use in the current live range that requires a register.
1896 // Spill starting part of live range up to that use.
1918 TraceAlloc("Assigning blocked reg %s to live range %d\n",
1924 // parts of active and inactive live regions that use the same register
1977 TraceAlloc("Splitting live range %d at %d\n", range->id(), pos.Value());
1996 TraceAlloc("Splitting live range %d in position between [%d, %d]\n",
2074 TraceAlloc("Spilling live range %d\n", range->id());
