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Lines Matching refs:Instruction

182   // instruction.
244   void Format(Instruction* instr, const char* format);
252   inline uint16_t ReadHU(int32_t addr, Instruction* instr);
253   inline int16_t ReadH(int32_t addr, Instruction* instr);
255   inline void WriteH(int32_t addr, uint16_t value, Instruction* instr);
256   inline void WriteH(int32_t addr, int16_t value, Instruction* instr);
258   inline int ReadW(int32_t addr, Instruction* instr);
259   inline void WriteW(int32_t addr, int value, Instruction* instr);
261   inline double ReadD(int32_t addr, Instruction* instr);
262   inline void WriteD(int32_t addr, double value, Instruction* instr);
272   // Executing is handled based on the instruction type.
273   void DecodeTypeRegister(Instruction* instr);
276   void ConfigureTypeRegister(Instruction* instr,
283   void DecodeTypeImmediate(Instruction* instr);
284   void DecodeTypeJump(Instruction* instr);
287   void SoftwareInterrupt(Instruction* instr);
289   // Executes one instruction.
290   void InstructionDecode(Instruction* instr);
291   // Execute one instruction placed in a branch delay slot.
292   void BranchDelayInstructionDecode(Instruction* instr) {
302   static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr);
347   Instruction* break_pc_;