Lines Matching full:operand
373 class Operand BASE_EMBEDDED {
376 Operand(Register base, int32_t disp);
379 Operand(Register base,
385 Operand(Register index,
389 // Offset from existing memory operand.
392 Operand(const Operand& base, int32_t offset);
395 // Does not check the "reg" part of the Operand.
419 // Adds operand displacement fields (offsets added to the memory address).
658 void push(const Operand& src);
661 void pop(const Operand& dst);
667 void movb(Register dst, const Operand& src);
669 void movb(const Operand& dst, Register src);
673 void movw(const Operand& dst, Register src);
676 void movl(Register dst, const Operand& src);
677 void movl(const Operand& dst, Register src);
678 void movl(const Operand& dst, Immediate imm);
683 void movq(const Operand& dst, Register src);
685 void movq(Register dst, const Operand& src);
691 void movl(const Operand& dst, Label* src);
694 void movq(const Operand& dst, Immediate value);
704 void movsxbq(Register dst, const Operand& src);
705 void movsxwq(Register dst, const Operand& src);
707 void movsxlq(Register dst, const Operand& src);
708 void movzxbq(Register dst, const Operand& src);
709 void movzxbl(Register dst, const Operand& src);
710 void movzxwq(Register dst, const Operand& src);
711 void movzxwl(Register dst, const Operand& src);
726 void cmovq(Condition cc, Register dst, const Operand& src);
728 void cmovl(Condition cc, Register dst, const Operand& src);
742 void addl(Register dst, const Operand& src) {
746 void addl(const Operand& dst, Immediate src) {
754 void addq(Register dst, const Operand& src) {
758 void addq(const Operand& dst, Register src) {
766 void addq(const Operand& dst, Immediate src) {
788 void cmpb(Register dst, const Operand& src) {
792 void cmpb(const Operand& dst, Register src) {
796 void cmpb(const Operand& dst, Immediate src) {
800 void cmpw(const Operand& dst, Immediate src) {
808 void cmpw(Register dst, const Operand& src) {
816 void cmpw(const Operand& dst, Register src) {
824 void cmpl(Register dst, const Operand& src) {
828 void cmpl(const Operand& dst, Register src) {
836 void cmpl(const Operand& dst, Immediate src) {
844 void cmpq(Register dst, const Operand& src) {
848 void cmpq(const Operand& dst, Register src) {
856 void cmpq(const Operand& dst, Immediate src) {
864 void and_(Register dst, const Operand& src) {
868 void and_(const Operand& dst, Register src) {
876 void and_(const Operand& dst, Immediate src) {
888 void andl(Register dst, const Operand& src) {
897 void decq(const Operand& dst);
899 void decl(const Operand& dst);
901 void decb(const Operand& dst);
916 void imul(Register dst, const Operand& src); // dst = dst * src.
920 void imull(Register dst, const Operand& src); // dst = dst * src.
924 void incq(const Operand& dst);
926 void incl(const Operand& dst);
928 void lea(Register dst, const Operand& src);
929 void leal(Register dst, const Operand& src);
935 void neg(const Operand& dst);
939 void not_(const Operand& dst);
950 void or_(Register dst, const Operand& src) {
954 void orl(Register dst, const Operand& src) {
958 void or_(const Operand& dst, Register src) {
970 void or_(const Operand& dst, Immediate src) {
974 void orl(const Operand& dst, Immediate src) {
1062 void subq(Register dst, const Operand& src) {
1066 void subq(const Operand& dst, Register src) {
1074 void subq(const Operand& dst, Immediate src) {
1082 void subl(Register dst, const Operand& src) {
1086 void subl(const Operand& dst, Immediate src) {
1100 void testb(const Operand& op, Immediate mask);
1101 void testb(const Operand& op, Register reg);
1104 void testl(const Operand& op, Immediate mask);
1105 void testq(const Operand& op, Register reg);
1121 void xorl(Register dst, const Operand& src) {
1129 void xorl(const Operand& dst, Immediate src) {
1133 void xor_(Register dst, const Operand& src) {
1137 void xor_(const Operand& dst, Register src) {
1145 void xor_(const Operand& dst, Immediate src) {
1150 void bt(const Operand& dst, Register src);
1151 void bts(const Operand& dst, Register src);
1198 void call(const Operand& operand);
1210 void jmp(const Operand& src);
1230 void fld_s(const Operand& adr);
1231 void fld_d(const Operand& adr);
1233 void fstp_s(const Operand& adr);
1234 void fstp_d(const Operand& adr);
1237 void fild_s(const Operand& adr);
1238 void fild_d(const Operand& adr);
1240 void fist_s(const Operand& adr);
1242 void fistp_s(const Operand& adr);
1243 void fistp_d(const Operand& adr);
1245 void fisttp_s(const Operand& adr);
1246 void fisttp_d(const Operand& adr);
1256 void fisub_s(const Operand& adr);
1296 void movsd(const Operand& dst, XMMRegister src);
1298 void movsd(XMMRegister dst, const Operand& src);
1300 void movdqa(const Operand& dst, XMMRegister src);
1301 void movdqa(XMMRegister dst, const Operand& src);
1303 void movss(XMMRegister dst, const Operand& src);
1304 void movss(const Operand& dst, XMMRegister src);
1306 void cvttss2si(Register dst, const Operand& src);
1308 void cvttsd2si(Register dst, const Operand& src);
1312 void cvtlsi2sd(XMMRegister dst, const Operand& src);
1314 void cvtqsi2sd(XMMRegister dst, const Operand& src);
1320 void cvtss2sd(XMMRegister dst, const Operand& src);
1337 void ucomisd(XMMRegister dst, const Operand& src);
1343 void emit_sse_operand(XMMRegister reg, const Operand& adr);
1414 // Emits a REX prefix that encodes a 64-bit operand size and
1422 // Emits a REX prefix that encodes a 64-bit operand size and
1427 inline void emit_rex_64(Register reg, const Operand& op);
1428 inline void emit_rex_64(XMMRegister reg, const Operand& op);
1430 // Emits a REX prefix that encodes a 64-bit operand size and
1436 // Emits a REX prefix that encodes a 64-bit operand size and
1441 inline void emit_rex_64(const Operand& op);
1443 // Emit a REX prefix that only sets REX.W to choose a 64-bit operand size.
1453 inline void emit_rex_32(Register reg, const Operand& op);
1461 inline void emit_rex_32(const Operand& op);
1471 inline void emit_optional_rex_32(Register reg, const Operand& op);
1485 // As for emit_optional_rex_32(Register, const Operand&), except that
1487 inline void emit_optional_rex_32(XMMRegister reg, const Operand& op);
1493 // Optionally do as emit_rex_32(const Operand&) if the operand register
1495 inline void emit_optional_rex_32(const Operand& op);
1499 // 1- or 4-byte offset for a memory operand. Also encodes
1500 // the second operand of the operation, a register or operation
1502 void emit_operand(Register reg, const Operand& adr) {
1507 // 1- or 4-byte offset for a memory operand. Also used to encode
1509 void emit_operand(int rm, const Operand& adr);
1531 void arithmetic_op_16(byte opcode, Register reg, const Operand& rm_reg);
1533 void arithmetic_op_32(byte opcode, Register reg, const Operand& rm_reg);
1535 void arithmetic_op(byte opcode, Register reg, const Operand& rm_reg);
1537 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src);
1543 const Operand& dst,
1550 const Operand& dst,
1557 const Operand& dst,