Lines Matching defs:cond
1541 ARMCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1543 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
1549 ARMCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1552 perhaps mvn{cond} dst, #0 as the second insn?
1555 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
1567 //zz X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1568 //zz addInstr(env, X86Instr_Set32(cond,dst));
1735 IRExpr* cond = e->Iex.Mux0X.cond;
1739 && cond->tag == Iex_Unop
1740 && cond->Iex.Unop.op == Iop_32to8
1741 && cond->Iex.Unop.arg->tag == Iex_Unop
1742 && cond->Iex.Unop.arg->Iex.Unop.op == Iop_1Uto32) {
1748 cc = iselCondCode(env, cond->Iex.Unop.arg->Iex.Unop.arg);
1753 /* Mux0X(cond, expr0, exprX) (general case) */
1760 r8 = iselIntExpr_R(env, cond);
1987 ARMCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1990 perhaps mvn{cond} dst, #0 as the second insn?
1993 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
2010 ty8 = typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond);
2018 r8 = iselIntExpr_R(env, e->Iex.Mux0X.cond);
5231 r8 = iselIntExpr_R(env, e->Iex.Mux0X.cond);
5394 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
5400 r8 = iselIntExpr_R(env, e->Iex.Mux0X.cond);
5537 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
5543 r8 = iselIntExpr_R(env, e->Iex.Mux0X.cond);
5727 ARMCondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data);
5729 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
