Lines Matching full:accesses
345 usually able to show both accesses involved in a race. At least
384 constraints upon the order in which memory accesses can
468 accesses to memory locations. If a location -- in this example,
471 two accesses are ordered by the happens-before relation. If so,
492 <para>What does it mean to say that two accesses from different
495 cause those accesses to happen in a particular order, irrespective of
505 immediately) locked by thread T2, then the memory accesses in T1
515 on the same CV, then the memory accesses in T1 prior to the
539 That is, all memory accesses performed by the parent prior to
540 creating the child are regarded as happening-before all the accesses
546 accesses made by the exiting thread.</para>
552 dependencies. It also monitors all memory accesses.</para>
562 both accesses are reads. That would be silly, since concurrent
565 <listitem><para>Two accesses are considered to be ordered by the
567 synchronisation events. For example, if T1 accesses some location
569 <function>pthread_cond_signals</function> T3, which then accesses L, then
571 accesses, even though it involves two different inter-thread
658 access points, even if one of the accesses is reported to be a read.
660 accesses?</para>
673 any happens-before relation between the two accesses. If
981 Helgrind collects enough information about "old" accesses that
995 about previous accesses. This can be dramatically faster
1020 <para>Information about "old" conflicting accesses is stored in
