Lines Matching refs:op1
53 unsigned op1 = currentInstruction[2].u.operand;
56 emitGetVirtualRegisters(op1, regT0, op2, regT2);
70 unsigned op1 = currentInstruction[2].u.operand;
73 UNUSED_PARAM(op1);
86 unsigned op1 = currentInstruction[2].u.operand;
91 emitGetVirtualRegister(op1, regT0);
96 emitGetVirtualRegisters(op1, regT0, op2, regT2);
121 unsigned op1 = currentInstruction[2].u.operand;
135 // We're reloading op1 to regT0 as we can no longer guarantee that
138 stubCall.addArgument(op1, regT0);
154 unsigned op1 = currentInstruction[2].u.operand;
160 emitGetVirtualRegister(op1, regT0);
175 emitGetVirtualRegisters(op1, regT0, op2, regT1);
176 if (!isOperandConstantImmediateInt(op1))
190 unsigned op1 = currentInstruction[2].u.operand;
194 // op1 = regT0
198 failures.append(emitJumpIfNotImmediateNumber(regT0)); // op1 is not a double
214 // op1 = regT0
216 if (!isOperandConstantImmediateInt(op1)) {
217 linkSlowCase(iter); // int32 check -- op1 is not an int
220 failures.append(emitJumpIfNotImmediateNumber(regT0)); // op1 is not a double
240 stubCall.addArgument(op1, regT0);
247 unsigned op1 = currentInstruction[1].u.operand;
256 if (isOperandConstantImmediateChar(op1)) {
262 addJump(branch32(LessThanOrEqual, regT0, Imm32(asString(getConstantOperand(op1))->tryGetValue()[0])), target);
266 emitGetVirtualRegister(op1, regT0);
275 emitGetVirtualRegister(op1, regT0);
279 } else if (isOperandConstantImmediateInt(op1)) {
282 int32_t op1imm = getConstantOperandImmediateInt(op1);
285 emitGetVirtualRegisters(op1, regT0, op2, regT1);
295 unsigned op1 = currentInstruction[1].u.operand;
303 if (isOperandConstantImmediateChar(op1) || isOperandConstantImmediateChar(op2)) {
309 stubCall.addArgument(op1, regT0);
342 } else if (isOperandConstantImmediateInt(op1)) {
350 int32_t op1imm = getConstantOperand(op1).asInt32();;
363 stubCall.addArgument(op1, regT2);
400 unsigned op1 = currentInstruction[1].u.operand;
409 if (isOperandConstantImmediateChar(op1)) {
415 addJump(branch32(GreaterThan, regT0, Imm32(asString(getConstantOperand(op1))->tryGetValue()[0])), target);
419 emitGetVirtualRegister(op1, regT0);
428 emitGetVirtualRegister(op1, regT0);
432 } else if (isOperandConstantImmediateInt(op1)) {
435 int32_t op1imm = getConstantOperandImmediateInt(op1);
438 emitGetVirtualRegisters(op1, regT0, op2, regT1);
448 unsigned op1 = currentInstruction[1].u.operand;
456 if (isOperandConstantImmediateChar(op1) || isOperandConstantImmediateChar(op2)) {
462 stubCall.addArgument(op1, regT0);
495 } else if (isOperandConstantImmediateInt(op1)) {
503 int32_t op1imm = getConstantOperand(op1).asInt32();
516 stubCall.addArgument(op1, regT2);
553 unsigned op1 = currentInstruction[1].u.operand;
562 if (isOperandConstantImmediateChar(op1)) {
568 addJump(branch32(invert ? LessThan : GreaterThanOrEqual, regT0, Imm32(asString(getConstantOperand(op1))->tryGetValue()[0])), target);
572 emitGetVirtualRegister(op1, regT0);
581 emitGetVirtualRegister(op1, regT0);
585 } else if (isOperandConstantImmediateInt(op1)) {
588 int32_t op1imm = getConstantOperandImmediateInt(op1);
591 emitGetVirtualRegisters(op1, regT0, op2, regT1);
601 unsigned op1 = currentInstruction[1].u.operand;
610 if (isOperandConstantImmediateChar(op1) || isOperandConstantImmediateChar(op2)) {
616 stubCall.addArgument(op1, regT0);
649 } else if (isOperandConstantImmediateInt(op1)) {
657 int32_t op1imm = getConstantOperand(op1).asInt32();;
670 stubCall.addArgument(op1, regT2);
718 unsigned op1 = currentInstruction[2].u.operand;
721 if (isOperandConstantImmediateInt(op1)) {
724 int32_t imm = getConstantOperandImmediateInt(op1);
729 emitGetVirtualRegister(op1, regT0);
736 emitGetVirtualRegisters(op1, regT0, op2, regT1);
746 unsigned op1 = currentInstruction[2].u.operand;
750 if (isOperandConstantImmediateInt(op1)) {
752 stubCall.addArgument(op1, regT2);
762 stubCall.addArgument(op1, regT2);
877 unsigned op1 = currentInstruction[2].u.operand;
887 emitGetVirtualRegisters(op1, regT0, op2, regT2);
916 unsigned op1 = currentInstruction[2].u.operand;
920 stubCall.addArgument(op1, regT2);
929 unsigned op1 = currentInstruction[2].u.operand;
935 stubCall.addArgument(op1, regT2);
949 void JIT::compileBinaryArithOp(OpcodeID opcodeID, unsigned, unsigned op1, unsigned op2, OperandTypes)
951 emitGetVirtualRegisters(op1, regT0, op2, regT1);
966 void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned result, unsigned op1, unsigned op2, OperandTypes types, bool op1HasImmediateIntFastCase, bool op2HasImmediateIntFastCase)
985 emitGetVirtualRegister(op1, regT0);
990 emitGetVirtualRegister(op1, regT0);
1002 emitGetVirtualRegister(op1, regT1);
1058 unsigned op1 = currentInstruction[2].u.operand;
1064 stubCall.addArgument(op1, regT2);
1070 if (isOperandConstantImmediateInt(op1)) {
1073 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1)), regT0));
1076 emitGetVirtualRegister(op1, regT0);
1081 compileBinaryArithOp(op_add, result, op1, op2, types);
1089 unsigned op1 = currentInstruction[2].u.operand;
1096 bool op1HasImmediateIntFastCase = isOperandConstantImmediateInt(op1);
1098 compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand), op1HasImmediateIntFastCase, op2HasImmediateIntFastCase);
1104 unsigned op1 = currentInstruction[2].u.operand;
1110 if (isOperandConstantImmediateInt(op1) && ((value = getConstantOperandImmediateInt(op1)) > 0)) {
1116 emitGetVirtualRegister(op1, regT0);
1121 compileBinaryArithOp(op_mul, result, op1, op2, types);
1129 unsigned op1 = currentInstruction[2].u.operand;
1133 bool op1HasImmediateIntFastCase = isOperandConstantImmediateInt(op1) && getConstantOperandImmediateInt(op1) > 0;
1135 compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand), op1HasImmediateIntFastCase, op2HasImmediateIntFastCase);
1141 unsigned op1 = currentInstruction[2].u.operand;
1145 if (isOperandConstantImmediateDouble(op1)) {
1146 emitGetVirtualRegister(op1, regT0);
1149 } else if (isOperandConstantImmediateInt(op1)) {
1150 emitLoadInt32ToDouble(op1, fpRegT0);
1152 emitGetVirtualRegister(op1, regT0);
1194 unsigned op1 = currentInstruction[2].u.operand;
1203 if (!isOperandConstantImmediateDouble(op1) && !isOperandConstantImmediateInt(op1)) {
1211 // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
1213 stubCall.addArgument(op1, regT2);
1221 unsigned op1 = currentInstruction[2].u.operand;
1225 compileBinaryArithOp(op_sub, result, op1, op2, types);
1232 unsigned op1 = currentInstruction[2].u.operand;
1236 compileBinaryArithOpSlowCase(op_sub, iter, result, op1, op2, types, false, false);
