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Lines Matching refs:regT1

55     emitLoad(src, regT1, regT0);
57     Jump srcNotInt = branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag));
65     addSlowCase(branch32(Above, regT1, TrustedImm32(JSValue::LowestTag)));
67     xor32(TrustedImm32(1 << 31), regT1);
68     store32(regT1, tagFor(dst));
83     stubCall.addArgument(regT1, regT0);
98         emitLoad(op2, regT1, regT0);
99         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
107         emitLoad(op1, regT1, regT0);
108         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
121         emitLoad(op1, regT1, regT0);
122         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
125         emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
126         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
187         emitLoad(op2, regT1, regT0);
188         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
196         emitLoad(op1, regT1, regT0);
197         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
209         emitLoad(op1, regT1, regT0);
210         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
213         emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
214         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
274         emitLoad(op2, regT1, regT0);
275         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
283         emitLoad(op1, regT1, regT0);
284         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::CellTag)));
296         emitLoad(op1, regT1, regT0);
297         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
300         emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
301         notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
370         emitLoad(op1, regT1, regT0);
371         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
377     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
379         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
412         emitLoad(op1, regT1, regT0);
413         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
430     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
432         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
449         // op1 = regT1:regT0
453             failures.append(branch32(AboveOrEqual, regT1, TrustedImm32(JSValue::LowestTag)));
470         // op1 = regT1:regT0
475                 Jump notDouble = branch32(Above, regT1, TrustedImm32(JSValue::LowestTag)); // op1 is not a double
537         emitLoad(op, regT1, regT0);
538         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
544     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
545     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
578         emitLoad(op, regT1, regT0);
579         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
585     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
586     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
619         emitLoad(op, regT1, regT0);
620         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
626     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
627     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
656     emitLoad(src, regT1, regT0);
657     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
670     stubCall.addArgument(regT1, regT0);
681     emitLoad(srcDst, regT1, regT0);
682     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
715     emitLoad(srcDst, regT1, regT0);
716     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
748     emitLoad(srcDst, regT1, regT0);
750     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
773     emitLoad(srcDst, regT1, regT0);
775     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
819     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
820     notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
842     emitLoad(op, regT1, regT0);
843     Jump notInt32 = branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag));
856         addSlowCase(branch32(Above, regT1, TrustedImm32(JSValue::LowestTag)));
928     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
929     notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
951     emitLoad(op, regT1, regT0);
952     Jump notInt32 = branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag));
965         addSlowCase(branch32(Above, regT1, TrustedImm32(JSValue::LowestTag)));
1022             addSlowCase(branch32(Above, regT1, TrustedImm32(JSValue::LowestTag)));
1159     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1160     notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
1241     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1243     notInt32Op1.append(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
1307     ASSERT(regT1 == X86Registers::edx);
1313         emitLoad(op1, regT1, regT0);
1315         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
1319         emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1320         addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));
1333     m_assembler.mfhi(regT1);
1337     Jump storeResult1 = branchTest32(NonZero, regT1);
1344     emitStoreInt32(dst, regT1, (op1 == dst || op2 == dst));
1380     emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1381     addSlowCase(branch32(NotEqual, regT1, TrustedImm32(JSValue::Int32Tag)));