Lines Matching full:pseudo
41 * Pseudo Ops:: Assembler Directives
748 ELF and ECOFF only), handling of pseudo-opcodes which may generate
930 assembler directives (often called "pseudo-ops") and assembler syntax.
1258 listing can be controlled by pseudo ops inside the assembler source
1292 changes the syntax and pseudo-op handling of `as' to make it compatible
1321 * `END' pseudo-op specifying start address
1323 The MRI `END' pseudo-op permits the specification of a start
1328 * `IDNT', `.ident' and `NAME' pseudo-ops
1330 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
1334 * `ORG' pseudo-op
1336 The m68k MRI `ORG' pseudo-op begins an absolute section at a given
1337 address. This differs from the usual `as' `.org' pseudo-op, which
1354 `DC.P' and `DCB.P' pseudo-ops are not supported.
1356 * `FEQU' pseudo-op
1358 The m68k `FEQU' pseudo-op is not supported.
1360 * `NOOBJ' pseudo-op
1362 The m68k `NOOBJ' pseudo-op is not supported.
1386 * `XREF' pseudo-op.
1388 The m68k `XREF' pseudo-op is ignored.
1390 * `.debug' pseudo-op
1392 The i960 `.debug' pseudo-op is not supported.
1394 * `.extended' pseudo-op
1396 The i960 `.extended' pseudo-op is not supported.
1398 * `.list' pseudo-op.
1400 The various options of the i960 `.list' pseudo-op are not
1403 * `.optimize' pseudo-op
1405 The i960 `.optimize' pseudo-op is not supported.
1407 * `.output' pseudo-op
1409 The i960 `.output' pseudo-op is not supported.
1411 * `.setreal' pseudo-op
1413 The i960 `.setreal' pseudo-op is not supported.
2209 The `.lcomm' pseudo-op defines a symbol in the bss section; see
2212 The `.comm' pseudo-op may be used to declare a common symbol, which
2516 File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top
2716 File: as.info, Node: Pseudo Ops, Next: Machine Dependencies, Prev: Expressions, Up: Top
2875 File: as.info, Node: Abort, Next: ABORT, Up: Pseudo Ops
2887 File: as.info, Node: ABORT, Next: Align, Prev: Abort, Up: Pseudo Ops
2896 File: as.info, Node: Align, Next: Altmacro, Prev: ABORT, Up: Pseudo Ops
2941 File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops
2951 File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops
2960 File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops
2996 File: as.info, Node: Byte, Next: Comm, Prev: Balign, Up: Pseudo Ops
3005 File: as.info, Node: Comm, Next: CFI directives, Prev: Byte, Up: Pseudo Ops
3033 File: as.info, Node: CFI directives, Next: Data, Prev: Comm, Up: Pseudo Ops
3106 File: as.info, Node: LNS directives, Next: Long, Prev: Ln, Up: Pseudo Ops
3162 File: as.info, Node: Data, Next: Def, Prev: CFI directives, Up: Pseudo Ops
3172 File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops
3181 File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops
3195 File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops
3205 File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops
3216 File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops
3224 File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops
3234 File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops
3244 File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops
3253 File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops
3261 File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops
3269 File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops
3279 File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops
3294 File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops
3313 File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops
3324 File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops
3335 File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops
3348 File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops
3356 File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops
3366 File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops
3378 File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops
3391 File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops
3412 File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops
3423 File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops
3437 File: as.info, Node: Global, Next: Hidden, Prev: Func, Up: Pseudo Ops
3456 File: as.info, Node: Hidden, Next: hword, Prev: Global, Up: Pseudo Ops
3472 File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops
3484 File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops
3498 File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops
3579 File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops
3596 File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops
3610 File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops
3621 File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops
3638 File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops
3667 File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops
3696 File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops
3715 File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops
3724 File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops
3745 File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops
3753 once in the final output file. The `.linkonce' pseudo-op must be used
3780 File: as.info, Node: Ln, Next: LNS directives, Prev: List, Up: Pseudo Ops
3788 File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops
3799 File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops
3815 File: as.info, Node: Long, Next: Macro, Prev: LNS directives, Up: Pseudo Ops
3823 File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops
3925 this pseudo-variable; you can copy that number to your output with
3934 File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops
3972 File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops
3980 File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops
3992 File: as.info, Node: Octa, Next: Org, Prev: Nolist, Up: Pseudo Ops
4004 File: as.info, Node: Org, Next: P2align, Prev: Octa, Up: Pseudo Ops
4033 File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops
4070 File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops
4089 File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops
4104 File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops
4113 File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops
4129 File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops
4148 File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops
4157 File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops
4172 File: as.info, Node: Quad, Next: Rept, Prev: PushSection, Up: Pseudo Ops
4186 File: as.info, Node: Rept, Next: Sbttl, Prev: Quad, Up: Pseudo Ops
4207 File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops
4219 File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops
4230 File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops
4411 File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops
4431 File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops
4442 File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops
4453 File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops
4481 File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops
4491 File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops
4501 File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops
4517 File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops
4571 File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops
4583 File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops
4604 File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops
4619 File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops
4668 File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops
4679 File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops
4689 File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops
4701 File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops
4747 File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops
4757 File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops
4766 File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops
4775 File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops
4784 File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops
4795 File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops
4804 File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops
4823 File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops
4846 File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops
4886 File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops
4898 File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Pseudo Ops, Up: Top
4908 pseudo-instructions for branch optimization.
5903 An error occurs if the name is undefined. Note - this pseudo op
6063 several pseudo opcodes, including several synthetic load instructions.
6068 This pseudo op will always evaluate to a legal ARM instruction
6592 There are a few CRIS-specific pseudo-directives in addition to the
6593 generic ones. *Note Pseudo Ops::. Constants emitted by
6594 pseudo-directives are in little-endian order for CRIS. There is no
7413 pseudo-instructions are needed on this family.
8712 Emit a warning message if any pseudo-instruction expansions
8718 pseudo-instructions.
8746 Change the temporary register used when expanding pseudo
8768 8.12.4.1 Other instruction support (pseudo-instructions)
8772 pseudo-instructions are supported. While these are supported, they are
8775 are the pseudo-instructions that result in expansions.
8778 The pseudo-instruction `mov imm,%rn' (where the immediate does not
8785 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
8797 will be expanded. For instance, the pseudo-instruction `adds
8806 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results
9442 `.high' pseudo op is encountered without a mathcing `.low' pseudo
9443 op. The presence of such an unmatches pseudo op usually indicates
10045 Certain pseudo opcodes are permitted for branch instructions. They
10050 The following table summarizes the pseudo-operations. A `*' flags
10056 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
10071 These are the simplest jump pseudo-operations; they always map to
10082 pseudo-operations to have all operands that are allowed for jsr
10087 Here, `jXX' stands for an entire family of pseudo-operations,
10089 list of pseudo-ops in this family is:
10093 Usually, each of these pseudo-operations expands to a single branch
10105 The full family of pseudo-operations covered here is
10111 a word displacement is sufficient, each of these pseudo-operations
10135 Each of these pseudo-operations always expands to a single Motorola
10233 optimization associated to the `jbra', `jbsr' and `jbXX' pseudo
10240 `jbXX' pseudo opcodes.
10461 Certain pseudo opcodes are permitted for branch instructions. They
10464 Motorola mnemonic. These pseudo opcodes are not affected by the
10467 The following table summarizes the pseudo-operations.
10489 These are the simplest jump pseudo-operations; they always map to
10494 Here, `jbXX' stands for an entire family of pseudo-operations,
10496 list of pseudo-ops in this family is:
10733 `.cpload' and `.cpsetup' pseudo-ops.
11201 pseudo-directive must be placed in a section with contents, code
11374 `IS' and `GREG' pseudo-operations must be specified in upper-case
11600 pseudo-instructions are needed on this family.
11617 information. We define new pseudo operation `.profiler' which will
11621 Pseudo operation format:
12001 * PowerPC-Pseudo:: PowerPC Assembler Directives
12004 File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent
12096 File: as.info, Node: PowerPC-Pseudo, Prev: PowerPC-Opts, Up: PPC-Dependent
12315 pseudo-instructions are needed on this family. Note, however, that
12444 Note that the `.mode' pseudo-op is not permitted if the ISA is not
12452 Note that the `.abi' pseudo-op is not permitted if the ABI is not
12454 command line, any `.abi' pseudo-ops in the source must match it.
12588 following pseudo-opcodes may be expanded into one or more alternate
12677 permits the `.long' pseudo-op to be used on a byte boundary. However,
12686 issues misaligned data pseudo-ops when it initializes certain packed
13020 The `LDX' pseudo-op is provided for loading the extended addressing bits
14126 Certain pseudo opcodes are permitted. They are for branch
14324 Enables relaxation. This allows the .longcall and .longjump pseudo
14535 `as' also implements the following pseudo ops:
14573 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
14577 With the hi() pseudo op adding in the top bit of the lo() pseudo
16451 * ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25)
16452 * ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35)
16555 * att_syntax pseudo op, i386: i386-Syntax. (line 6)
16556 * att_syntax pseudo op, x86-64: i386-Syntax. (line 6)
16611 * callj, i960 pseudo-opcode: callj-i960. (line 6)
16690 * CRIS pseudo-op .arch: CRIS-Pseudos. (line 45)
16691 * CRIS pseudo-op .dword: CRIS-Pseudos. (line 12)
16692 * CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17)
16693 * CRIS pseudo-ops: CRIS-Pseudos. (line 6)
16698 * ctoff pseudo-op, V850: V850 Opcodes. (line 111)
16759 * directives for PowerPC: PowerPC-Pseudo. (line 6)
16763 * directives, machine independent: Pseudo Ops. (line 6)
16932 * hi pseudo-op, V850: V850 Opcodes. (line 33)
16933 * hi0 pseudo-op, V850: V850 Opcodes. (line 10)
16936 * hilo pseudo-op, V850: V850 Opcodes. (line 55)
16945 * i386 att_syntax pseudo op: i386-Syntax. (line 6)
16951 * i386 intel_syntax pseudo op: i386-Syntax. (line 6)
16971 * i960 callj pseudo-opcode: callj-i960. (line 6)
17054 * intel_syntax pseudo op, i386: i386-Syntax. (line 6)
17055 * intel_syntax pseudo op, x86-64: i386-Syntax. (line 6)
17089 * LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15)
17144 * lo pseudo-op, V850: V850 Opcodes. (line 22)
17161 * longcall pseudo-op, V850: V850 Opcodes. (line 123)
17163 * longjump pseudo-op, V850: V850 Opcodes. (line 129)
17189 * M680x0 pseudo-opcodes: M68K-Branch. (line 6)
17206 * M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6)
17223 * machine independent directives: Pseudo Ops. (line 6)
17277 * MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131)
17278 * MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97)
17279 * MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131)
17280 * MMIX pseudo-op GREG: MMIX-Pseudos. (line 50)
17281 * MMIX pseudo-op IS: MMIX-Pseudos. (line 42)
17282 * MMIX pseudo-op LOC: MMIX-Pseudos. (line 7)
17283 * MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28)
17284 * MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108)
17285 * MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120)
17286 * MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108)
17287 * MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108)
17288 * MMIX pseudo-ops: MMIX-Pseudos. (line 6)
17343 * NOP pseudo op, ARM: ARM Opcodes. (line 9)
17451 * PowerPC directives: PowerPC-Pseudo. (line 6)
17468 * pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45)
17469 * pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12)
17470 * pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17)
17471 * pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131)
17472 * pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97)
17473 * pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131)
17474 * pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50)
17475 * pseudo-op IS, MMIX: MMIX-Pseudos. (line 42)
17476 * pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7)
17477 * pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28)
17478 * pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108)
17479 * pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120)
17480 * pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108)
17481 * pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108)
17482 * pseudo-opcodes, M680x0: M68K-Branch. (line 6)
17483 * pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6)
17484 * pseudo-ops for branch, VAX: VAX-branch. (line 6)
17485 * pseudo-ops, CRIS: CRIS-Pseudos. (line 6)
17486 * pseudo-ops, machine independent: Pseudo Ops. (line 6)
17487 * pseudo-ops, MMIX: MMIX-Pseudos. (line 6)
17558 * sdaoff pseudo-op, V850: V850 Opcodes. (line 65)
17736 * tdaoff pseudo-op, V850: V850 Opcodes. (line 81)
17841 * x86-64 att_syntax pseudo op: i386-Syntax. (line 6)
17846 * x86-64 intel_syntax pseudo op: i386-Syntax. (line 6)
17886 * zdaoff pseudo-op, V850: V850 Opcodes. (line 99)
17960 Node: Pseudo Ops96536
18256 Node: PowerPC-Pseudo433590
