Lines Matching full:pseudo
5033 can be inlined in number of pseudo instructions.
5055 \&\fINote:\fR pseudo instruction represents, in this particular context, an
5350 Switch off sharing stack slots allocated for pseudo\-registers. Each
5351 pseudo-register which did not get a hard register will get a separate
6110 each web individual pseudo register. This allows the register allocation pass
7125 in combiner for a pseudo register as last known value of that register. The default
7217 algorithm do not use pseudo-register conflicts. The default value of
11143 Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
11144 during code generation. These pseudo-registers will be used like real
11692 Specify the number of pseudo-soft registers which are used for the
11693 code generation. The maximum number is 32. Using more pseudo-soft
