Lines Matching full:pseudo
5179 can be inlined in number of pseudo instructions.
5201 \&\fINote:\fR pseudo instruction represents, in this particular context, an
5496 Switch off sharing stack slots allocated for pseudo\-registers. Each
5497 pseudo-register which did not get a hard register will get a separate
6256 each web individual pseudo register. This allows the register allocation pass
7358 in combiner for a pseudo register as last known value of that register. The default
7459 algorithm do not use pseudo-register conflicts. The default value of
11408 Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
11409 during code generation. These pseudo-registers will be used like real
11957 Specify the number of pseudo-soft registers which are used for the
11958 code generation. The maximum number is 32. Using more pseudo-soft
