| /frameworks/base/media/libeffects/lvm/lib/SpectrumAnalyzer/src/ |
| LVPSA_QPD_Process.c | 77 LVM_INT16 D0;
114 D0 = (LVM_INT16)(Xg0 - V0);
116 temp2 = (LVM_INT32)D0;
119 D0 = (LVM_INT16)(D0>>1);
120 if (D0 < 0){
121 D0 = (LVM_INT16)(-D0);
124 temp2 = (LVM_INT32)D0;
125 MUL32x32INTO32((LVM_INT32)D0,Km,temp,31)
[all...] |
| /external/speex/libspeex/ |
| math_approx.h | 245 #define D0 16384
260 frac = ADD16(D0, MULT16_16_Q14(frac, ADD16(D1, MULT16_16_Q14(frac, ADD16(D2 , MULT16_16_Q14(D3,frac))))));
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 5 D0:
701 // CHECK: ('_string', 'D0')
|
| x86_64-symbols.s | 5 D0:
658 // CHECK: ('_string', 'D0')
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 385 const TargetRegisterInfo *TRI, unsigned &D0,
388 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
393 D0 = TRI->getSubReg(Reg, ARM::dsub_0);
399 D0 = TRI->getSubReg(Reg, ARM::dsub_1);
423 unsigned D0, D1, D2, D3;
424 GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3);
425 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
496 unsigned D0, D1, D2, D3;
497 GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
498 MIB.addReg(D0).addReg(D1)
[all...] |
| /libcore/luni/src/test/java/libcore/java/lang/ |
| ClassCastExceptionTest.java | 157 A0, B0, C0, D0, E0, F0, G0, H0, I0, J0, K0, L0, M0, N0, O0, P0, Q0, R0, S0, T0, U0, V0, W0, X0, Y0, Z0,
162 A0, B0, C0, D0, E0, F0, G0, H0, I0, J0, K0, L0, M0, N0, O0, P0, Q0, R0, S0, T0, U0, V0, W0, X0, Y0, Z0,
|
| /external/openssl/crypto/bn/asm/ |
| pa-risc2W.s | 870 $D0
899 B $D0
[all...] |
| pa-risc2.s | 796 ADDIB,=,N -1,%r8,$D0 ;offset 0x974
894 $D0
[all...] |
| /external/opencv/cxcore/src/ |
| cxmatmul.cpp | [all...] |
| /frameworks/base/media/libstagefright/codecs/avc/enc/src/ |
| intra_est.cpp | 733 int P_x, Q_x, R_x, P_y, Q_y, R_y, D, D0, D1;
864 temp |= (Q1 << 24); // [R0 D0 D1 D1]
867 D0 = (P_K + 3 * P_L + 2) >> 2;
872 temp |= (D0 << 24);
877 temp = R0 | (D0 << 8);
[all...] |
| /prebuilt/common/osgi/ |
| osgi.jar | |
