/external/clang/lib/StaticAnalyzer/Checkers/ |
DivZeroChecker.cpp | 34 BinaryOperator::Opcode Op = B->getOpcode(); 35 if (Op != BO_Div && 36 Op != BO_Rem && 37 Op != BO_DivAssign && 38 Op != BO_RemAssign)
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IdempotentOperationChecker.cpp | 17 //|Operator | x op x | x op 1 | 1 op x | x op 0 | 0 op x | x op ~0 | ~0 op x | 154 BinaryOperator::Opcode Op = B->getOpcode(); 157 switch (Op) { 183 // x op [all...] |
/external/llvm/lib/Target/MBlaze/InstPrinter/ |
MBlazeInstPrinter.cpp | 37 const MCOperand &Op = MI->getOperand(OpNo); 38 if (Op.isReg()) { 39 O << getRegisterName(Op.getReg()); 40 } else if (Op.isImm()) { 41 O << (int32_t)Op.getImm(); 43 assert(Op.isExpr() && "unknown operand kind in printOperand"); 44 O << *Op.getExpr();
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/external/llvm/lib/Target/MSP430/InstPrinter/ |
MSP430InstPrinter.cpp | 36 const MCOperand &Op = MI->getOperand(OpNo); 37 if (Op.isImm()) 38 O << Op.getImm(); 40 assert(Op.isExpr() && "unknown pcrel immediate operand"); 41 O << *Op.getExpr(); 48 const MCOperand &Op = MI->getOperand(OpNo); 49 if (Op.isReg()) { 50 O << getRegisterName(Op.getReg()); 51 } else if (Op.isImm()) { 52 O << '#' << Op.getImm() [all...] |
/external/llvm/include/llvm/ |
User.h | 79 template <int Idx> Use &Op() { 82 template <int Idx> const Use &Op() const {
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/external/llvm/lib/Target/Mips/InstPrinter/ |
MipsInstPrinter.cpp | 80 const MCOperand &Op = MI->getOperand(OpNo); 81 if (Op.isReg()) { 82 printRegName(O, Op.getReg()); 86 if (Op.isImm()) { 87 O << Op.getImm(); 91 assert(Op.isExpr() && "unknown operand kind in printOperand"); 92 O << *Op.getExpr();
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/external/llvm/lib/Target/PTX/ |
PTXFPRoundingModePass.cpp | 167 MachineOperand &Op = MI.getOperand(Desc.first); 169 if (Op.getImm() == PTXRoundingMode::RndDefault) { 170 Op.setImm(Desc.second);
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86ATTInstPrinter.cpp | 59 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op, 61 switch (MI->getOperand(Op).getImm()) { 80 const MCOperand &Op = MI->getOperand(OpNo); 81 if (Op.isImm()) 83 O << (int)Op.getImm(); 85 assert(Op.isExpr() && "unknown pcrel immediate operand"); 86 O << *Op.getExpr(); 92 const MCOperand &Op = MI->getOperand(OpNo); 93 if (Op.isReg()) { 94 O << '%' << getRegisterName(Op.getReg()) [all...] |
X86IntelInstPrinter.cpp | 49 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op, 51 switch (MI->getOperand(Op).getImm()) { 68 const MCOperand &Op = MI->getOperand(OpNo); 69 if (Op.isImm()) 70 O << Op.getImm(); 72 assert(Op.isExpr() && "unknown pcrel immediate operand"); 73 O << *Op.getExpr(); 84 const MCOperand &Op = MI->getOperand(OpNo); 85 if (Op.isReg()) { 86 PrintRegName(O, getRegisterName(Op.getReg())) [all...] |
/external/llvm/lib/Transforms/Utils/ |
ValueMapper.cpp | 65 Value *OP = MD->getOperand(i); 66 if (OP == 0 || MapValue(OP, VM, Flags, TypeMapper) == OP) continue; 72 Value *Op = MD->getOperand(i); 73 Elts.push_back(Op ? MapValue(Op, VM, Flags, TypeMapper) : 0); 108 Value *Op = C->getOperand(OpNo); 109 Mapped = MapValue(Op, VM, Flags, TypeMapper); 163 for (User::op_iterator op = I->op_begin(), E = I->op_end(); op != E; ++op) [all...] |
LoopUnroll.cpp | 43 for (unsigned op = 0, E = I->getNumOperands(); op != E; ++op) { 44 Value *Op = I->getOperand(op); 45 ValueToValueMapTy::iterator It = VMap.find(Op); 47 I->setOperand(op, It->second);
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/external/clang/lib/AST/ |
ExprClassification.cpp | 197 // C++ [expr.unary.op]p1: The unary * operator performs indirection: 211 const Expr *Op = cast<UnaryOperator>(E)->getSubExpr()->IgnoreParens(); 212 Cl::Kinds K = ClassifyInternal(Ctx, Op); 215 if (isa<ObjCPropertyRefExpr>(Op))
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/external/llvm/lib/Target/PTX/InstPrinter/ |
PTXInstPrinter.cpp | 114 const MCOperand &Op = MI->getOperand(OpNo); 115 if (Op.isImm()) { 116 O << Op.getImm(); 117 } else if (Op.isFPImm()) { 118 double Imm = Op.getFPImm(); 129 assert(Op.isExpr() && "unknown operand kind in printOperand"); 130 const MCExpr *Expr = Op.getExpr(); 135 O << *Op.getExpr(); 152 const MCOperand &Op = MI->getOperand(OpNo); 153 assert (Op.isImm() && "Rounding modes must be immediate values") [all...] |
/external/llvm/lib/VMCore/ |
Instruction.cpp | 363 /// Associative operators satisfy: x op (y op z) === (x op y) op z 374 /// Commutative operators satisfy: (x op y) === (y op x) 379 bool Instruction::isCommutative(unsigned op) { 380 switch (op) { 406 ConstantInt *Op = dyn_cast<ConstantInt>(getOperand(1)); 407 return Op && !Op->isNullValue() [all...] |
/external/llvm/utils/TableGen/ |
DAGISelEmitter.cpp | 32 Record *Op = P->getOperator(); 33 if (Op->isSubClassOf("Instruction")) { 35 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op); 51 Record *Op = P->getOperator(); 52 if (Op->isSubClassOf("Instruction")) { 53 Cost += Op->getValueAsInt("CodeSize");
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/external/llvm/lib/Bitcode/Writer/ |
ValueEnumerator.cpp | 368 const Value *Op = C->getOperand(i); 372 if (isa<BasicBlock>(Op)) continue; 374 EnumerateOperandType(Op);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | 72 SDValue Op(Node, ResNo); 74 VRBaseMap.erase(Op); 75 bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second; 107 SDValue Op = User->getOperand(i); 108 if (Op.getNode() != Node || Op.getResNo() != ResNo) 110 EVT VT = Node->getValueType(Op.getResNo()); 161 SDValue Op(Node, ResNo); 163 VRBaseMap.erase(Op); 164 bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second [all...] |
SelectionDAGPrinter.cpp | 95 SDValue Op = EI.getNode()->getOperand(EI.getOperand()); 96 EVT VT = Op.getValueType();
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
PPCInstPrinter.cpp | 93 assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!"); 111 "Need to specify 'cc' or 'reg' as predicate op modifier!"); 248 const MCOperand &Op = MI->getOperand(OpNo); 249 if (Op.isReg()) { 250 const char *RegName = getRegisterName(Op.getReg()); 259 if (Op.isImm()) { 260 O << Op.getImm(); 264 assert(Op.isExpr() && "unknown operand kind in printOperand"); 265 O << *Op.getExpr();
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86AsmBackend.cpp | 116 static unsigned getRelaxedOpcodeBranch(unsigned Op) { 117 switch (Op) { 119 return Op; 141 static unsigned getRelaxedOpcodeArith(unsigned Op) { 142 switch (Op) { 144 return Op; 210 static unsigned getRelaxedOpcode(unsigned Op) { 211 unsigned R = getRelaxedOpcodeArith(Op); 212 if (R != Op) 214 return getRelaxedOpcodeBranch(Op); [all...] |
/external/llvm/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 89 Operator *Op; // The Operation used to generate this value. 147 static const char *getZeroCostOpName(unsigned short Op) { 148 if (ShufTab[Op].Arg0 == 0x0123) 150 else if (ShufTab[Op].Arg0 == 0x4567) 162 std::cerr << " = " << ShufTab[ThisOp].Op->getName() << "("; 176 if (!ShufTab[Vals[ValNo]].Op->isOnlyLHSOperator()) { 222 ShufTab[0x0123].Op = 0; 225 ShufTab[0x4567].Op = 0; 304 Operator *Op = TheOperators[opnum]; 306 // Evaluate op(LHS,LHS [all...] |
/frameworks/compile/slang/BitWriter_2_9/ |
ValueEnumerator.cpp | 368 const Value *Op = C->getOperand(i); 372 if (isa<BasicBlock>(Op)) continue; 374 EnumerateOperandType(Op);
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/external/clang/lib/StaticAnalyzer/Core/ |
BugReporterVisitors.cpp | 617 BinaryOperator::Opcode Op = BExpr->getOpcode(); 620 switch (Op) { 622 case BO_LT: Op = BO_GT; break; 623 case BO_GT: Op = BO_LT; break; 624 case BO_LE: Op = BO_GE; break; 625 case BO_GE: Op = BO_LE; break; 629 switch (Op) { 630 case BO_EQ: Op = BO_NE; break; 631 case BO_NE: Op = BO_EQ; break; 632 case BO_LT: Op = BO_GE; break [all...] |
ExprEngineC.cpp | 42 BinaryOperator::Opcode Op = B->getOpcode(); 44 if (Op == BO_Assign) { 62 SVal Result = evalBinOp(state, Op, LeftV, RightV, B->getType()); 75 switch (Op) { 78 case BO_MulAssign: Op = BO_Mul; break; 79 case BO_DivAssign: Op = BO_Div; break; 80 case BO_RemAssign: Op = BO_Rem; break; 81 case BO_AddAssign: Op = BO_Add; break; 82 case BO_SubAssign: Op = BO_Sub; break; 83 case BO_ShlAssign: Op = BO_Shl; break [all...] |
/external/llvm/examples/Kaleidoscope/Chapter2/ |
toy.cpp | 100 char Op; 103 BinaryExprAST(char op, ExprAST *lhs, ExprAST *rhs) 104 : Op(op), LHS(lhs), RHS(rhs) {}
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