/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmLexer.cpp | 106 int RegNo = -1; 108 case '0': RegNo = X86::DR0; break; 109 case '1': RegNo = X86::DR1; break; 110 case '2': RegNo = X86::DR2; break; 111 case '3': RegNo = X86::DR3; break; 112 case '4': RegNo = X86::DR4; break; 113 case '5': RegNo = X86::DR5; break; 114 case '6': RegNo = X86::DR6; break; 115 case '7': RegNo = X86::DR7; break; 118 if (RegNo != -1) [all...] |
X86AsmParser.cpp | 91 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); 128 unsigned RegNo; 168 return Reg.RegNo; 332 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) { 334 Res->Reg.RegNo = RegNo; 398 bool X86ATTAsmParser::ParseRegister(unsigned &RegNo, 400 RegNo = 0; 411 RegNo = MatchRegisterName(Tok.getString()); 414 if (RegNo == 0 [all...] |
/external/llvm/lib/Target/PowerPC/InstPrinter/ |
PPCInstPrinter.cpp | 30 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 31 OS << getRegisterName(RegNo); 176 unsigned RegNo; 179 case PPC::CR0: RegNo = 0; break; 180 case PPC::CR1: RegNo = 1; break; 181 case PPC::CR2: RegNo = 2; break; 182 case PPC::CR3: RegNo = 3; break; 183 case PPC::CR4: RegNo = 4; break; 184 case PPC::CR5: RegNo = 5; break; 185 case PPC::CR6: RegNo = 6; break [all...] |
/external/llvm/utils/TableGen/ |
RegisterInfoEmitter.cpp | 190 int RegNo = I->second[i]; 195 << RegNo << ", "; 426 << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n" 427 << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n" 719 << "::getSubReg(unsigned RegNo, unsigned Index) const {\n" 720 << " switch (RegNo) {\n" 740 << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n" 741 << " switch (RegNo) {\n"
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/external/llvm/lib/Target/MBlaze/AsmParser/ |
MBlazeAsmParser.cpp | 40 MBlazeOperand *ParseRegister(unsigned &RegNo); 45 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); 388 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo, 390 return (ParseRegister(RegNo) == 0); 393 MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) { 400 RegNo = MatchRegisterName(getLexer().getTok().getIdentifier()); 401 if (RegNo == 0) 405 return MBlazeOperand::CreateReg(RegNo, S, E); 461 unsigned RegNo; 462 Op = ParseRegister(RegNo); [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 119 unsigned RegNo; // For MO_Register. 137 // Register number is in SmallContents.RegNo. 223 return SmallContents.RegNo; 503 Op.SmallContents.RegNo = Reg;
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/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 112 unsigned RegNo = getPPCRegisterNumbering(I->first); 113 if (VRRegNo[RegNo] == I->first) // If this really is a vector reg. 114 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked. 119 unsigned RegNo = getPPCRegisterNumbering(*I); 120 if (VRRegNo[RegNo] == *I) // If this really is a vector reg. 121 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked. [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 406 unsigned RegNo = getARMRegisterNumbering(Reg); 411 return RegNo; 416 return 2 * RegNo; [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
AsmPrinter.cpp | 535 unsigned RegNo = MI->getOperand(0).getReg(); 537 AP.TM.getRegisterInfo()->getName(RegNo)); [all...] |
/external/llvm/lib/MC/MCParser/ |
AsmParser.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 229 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); [all...] |