| /external/llvm/lib/Target/Alpha/ |
| AlphaRegisterInfo.h | 28 const TargetInstrInfo &TII;
30 AlphaRegisterInfo(const TargetInstrInfo &tii);
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| AlphaBranchSelector.cpp | 58 const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
59 MBBI->setDesc(TII->get(MBBI->getOperand(0).getImm()));
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| AlphaFrameLowering.cpp | 50 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
56 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29)
58 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29)
61 BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT))
82 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
85 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
87 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
95 BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ))
98 BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15)
108 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo()
[all...] |
| AlphaLLRP.cpp | 49 const TargetInstrInfo *TII = F.getTarget().getInstrInfo();
77 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
89 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
92 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
103 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
105 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
107 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
140 BuildMI(MBB, MBB.end(), dl, TII->get(Alpha::BISr), Alpha::R31)
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| /external/llvm/lib/Target/CellSPU/ |
| SPUHazardRecognizers.h | 28 const TargetInstrInfo &TII;
32 SPUHazardRecognizer(const TargetInstrInfo &TII);
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| SPURegisterInfo.h | 31 const TargetInstrInfo &TII;
37 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
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| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.h | 28 const TargetInstrInfo &TII;
43 XCoreRegisterInfo(const TargetInstrInfo &tii);
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| /external/llvm/lib/Target/Blackfin/ |
| BlackfinRegisterInfo.h | 31 const TargetInstrInfo &TII;
33 BlackfinRegisterInfo(BlackfinSubtarget &st, const TargetInstrInfo &tii);
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| BlackfinFrameLowering.cpp | 49 const BlackfinInstrInfo &TII =
69 BuildMI(MBB, MBBI, dl, TII.get(BF::LINK)).addImm(FrameSize);
79 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
81 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH))
83 BuildMI(MBB, MBBI, dl, TII.get(BF::MOVE), BF::FP)
86 BuildMI(MBB, MBBI, dl, TII.get(BF::ADDpp), BF::SP)
97 const BlackfinInstrInfo &TII =
113 BuildMI(MBB, MBBI, dl, TII.get(BF::UNLINK));
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| /external/llvm/lib/Target/Mips/ |
| MipsRegisterInfo.h | 30 const TargetInstrInfo &TII;
32 MipsRegisterInfo(const MipsSubtarget &Subtarget, const TargetInstrInfo &tii);
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| MipsEmitGPRestore.cpp | 31 const TargetInstrInfo *TII;
35 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
67 BuildMI(MBB, I, dl, TII->get(Mips::LW), Mips::GP).addFrameIndex(FI)
80 BuildMI(MBB, ++I, dl, TII->get(Mips::LW), Mips::GP).addFrameIndex(FI)
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| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.h | 32 const TargetInstrInfo &TII;
34 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
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| PPCHazardRecognizers.h | 43 const TargetInstrInfo &TII;
63 PPCHazardRecognizer970(const TargetInstrInfo &TII);
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| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.h | 30 const TargetInstrInfo &TII;
32 SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii);
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| SparcFrameLowering.cpp | 32 const SparcInstrInfo &TII =
55 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
61 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
63 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
65 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
73 const SparcInstrInfo &TII =
78 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.h | 30 const SystemZInstrInfo &TII;
32 SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii);
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| /external/llvm/include/llvm/CodeGen/ |
| MachineSSAUpdater.h | 52 const TargetInstrInfo *TII;
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| ProcessImplicitDefs.h | 28 const TargetInstrInfo *TII;
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| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 27 const ARMBaseInstrInfo &TII;
38 const ARMBaseInstrInfo &tii,
42 ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
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| ARMBaseRegisterInfo.h | 77 const ARMBaseInstrInfo &TII;
89 explicit ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii,
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| /external/llvm/lib/Target/MBlaze/ |
| MBlazeRegisterInfo.h | 40 const TargetInstrInfo &TII;
43 const TargetInstrInfo &tii);
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| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.h | 30 const TargetInstrInfo &TII;
36 MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii);
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| /external/llvm/lib/Target/PTX/ |
| PTXRegisterInfo.h | 29 const TargetInstrInfo &TII;
33 const TargetInstrInfo &tii);
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| /external/llvm/lib/CodeGen/ |
| CriticalAntiDepBreaker.h | 38 const TargetInstrInfo *TII;
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 32 const TargetInstrInfo *TII;
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