| /external/llvm/lib/Target/PowerPC/ |
| PPCJITInfo.h | 25 PPCTargetMachine &TM;
28 PPCJITInfo(PPCTargetMachine &tm, bool tmIs64Bit) : TM(tm) {
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| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 26 const X86TargetMachine &TM;
29 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti)
33 TM(tm), STI(sti) {
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| X86JITInfo.h | 26 X86TargetMachine &TM;
31 explicit X86JITInfo(X86TargetMachine &tm);
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| X86MCInstLower.h | 34 const TargetMachine &TM;
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| X86RegisterInfo.h | 29 X86TargetMachine &TM;
54 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
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| /external/llvm/lib/Target/CellSPU/ |
| SPUInstrInfo.h | 27 SPUTargetMachine &TM;
30 explicit SPUInstrInfo(SPUTargetMachine &tm);
39 CreateTargetHazardRecognizer(const TargetMachine *TM,
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| SPUNopFiller.cpp | 30 TargetMachine &TM;
36 SPUNopFiller(TargetMachine &tm)
37 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()),
38 IID(tm.getInstrItineraryData())
132 FunctionPass *llvm::createSPUNopFillerPass(SPUTargetMachine &tm) {
133 return new SPUNopFiller(tm);
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.h | 29 SystemZTargetMachine &TM;
32 SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii);
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| SystemZISelLowering.h | 58 explicit SystemZTargetLowering(SystemZTargetMachine &TM);
140 const SystemZTargetMachine &TM;
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| SystemZInstrInfo.h | 55 SystemZTargetMachine &TM;
57 explicit SystemZInstrInfo(SystemZTargetMachine &TM);
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| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.h | 29 MSP430TargetMachine &TM;
36 MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii);
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| MSP430InstrInfo.h | 45 MSP430TargetMachine &TM;
47 explicit MSP430InstrInfo(MSP430TargetMachine &TM);
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| MSP430ISelLowering.h | 74 explicit MSP430TargetLowering(MSP430TargetMachine &TM);
177 const MSP430TargetMachine &TM;
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| /external/llvm/lib/Target/PTX/ |
| PTXInstrInfo.h | 33 PTXTargetMachine &TM;
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| /external/llvm/include/llvm/CodeGen/ |
| MachineFunctionAnalysis.h | 28 const TargetMachine &TM;
34 explicit MachineFunctionAnalysis(const TargetMachine &tm,
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| FastISel.h | 52 const TargetMachine &TM;
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| /external/llvm/lib/CodeGen/ |
| ELFCodeEmitter.h | 26 TargetMachine &TM;
41 explicit ELFCodeEmitter(ELFWriter &ew) : EW(ew), TM(EW.TM) {}
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 31 const TargetMachine *TM;
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| /external/llvm/lib/ExecutionEngine/MCJIT/ |
| MCJIT.h | 26 MCJIT(Module *M, TargetMachine *tm, TargetJITInfo &tji,
30 TargetMachine *TM;
84 TargetMachine *TM);
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| /external/llvm/lib/Target/Alpha/ |
| AlphaLLRP.cpp | 38 AlphaTargetMachine &TM;
41 AlphaLLRPPass(AlphaTargetMachine &tm)
42 : MachineFunctionPass(ID), TM(tm) { }
156 FunctionPass *llvm::createAlphaLLRPPass(AlphaTargetMachine &tm) {
157 return new AlphaLLRPPass(tm);
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| /external/llvm/lib/Target/Mips/ |
| MipsEmitGPRestore.cpp | 30 TargetMachine &TM;
34 Inserter(TargetMachine &tm)
35 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
47 if (TM.getRelocationModel() != Reloc::PIC_)
91 FunctionPass *llvm::createMipsEmitGPRestorePass(MipsTargetMachine &tm) {
92 return new Inserter(tm);
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| MipsDelaySlotFiller.cpp | 42 TargetMachine &TM;
47 Filler(TargetMachine &tm)
48 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
122 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
123 return new Filler(tm);
250 for (const unsigned *Alias = TM.getRegisterInfo()->getAliasSet(Reg);
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| /external/dropbear/libtomcrypt/src/ciphers/ |
| rc2.c | 74 unsigned T8, TM;
102 TM = (255 >> (unsigned)(7 & -bits));
103 tmp[128 - T8] = permute[tmp[128 - T8] & TM];
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| /external/llvm/lib/ExecutionEngine/JIT/ |
| JIT.h | 58 TargetMachine &TM; // The current target we are compiling to
80 JIT(Module *M, TargetMachine &tm, TargetJITInfo &tji,
190 TargetMachine *TM);
213 TargetMachine &tm);
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| JITDebugRegisterer.h | 78 TargetMachine &TM;
89 JITDebugRegisterer(TargetMachine &tm);
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