/frameworks/base/media/libstagefright/codecs/avc/enc/src/ |
sad_inline.h | 195 RSB x7, x7, x7, lsl #8; local 213 RSB x7, x7, x7, lsl #8; local 261 MOVS x8, ref, lsl #31 ; local 351 __asm__ volatile("EOR %1, %2, %0\n\tSUBS %0, %2, %0\n\tEOR %1, %1, %0\n\tAND %1, %3, %1, lsr #1\n\tORRCC %1, %1, #0x80000000\n\tRSB %1, %1, %1, lsl #8\n\tADD %0, %0, %1, asr #7\n\tEOR %0, %0, %1, asr #7": "=r"(src1), "=&r"(x7): "r"(src2), "r"(mask)); 360 __asm__ volatile("EOR %1, %2, %0\n\tADDS %0, %2, %0\n\tEOR %1, %1, %0\n\tANDS %1, %3, %1, rrx\n\tRSB %1, %1, %1, lsl #8\n\tSUB %0, %0, %1, asr #7\n\tEOR %0, %0, %1, asr #7": "=r"(src1), "=&r"(x7): "r"(src2), "r"(mask));
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAddressingModes.h | 29 lsl, enumerator in enum:llvm::ARM_AM::ShiftOpc 48 case ARM_AM::lsl: return "lsl"; 59 case ARM_AM::lsl: return 0; 104 // reg [asr|lsl|lsr|ror|rrx] reg 105 // reg [asr|lsl|lsr|ror|rrx] imm
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/frameworks/base/media/libstagefright/codecs/m4v_h263/enc/src/ |
sad_inline.h | 200 RSB x7, x7, x7, lsl #8; local 218 RSB x7, x7, x7, lsl #8; local 266 MOVS x8, ref, lsl #31 ; local 378 "rsb %0, %0, %0, lsl #8\n\t" 402 "rsb %1, %1, %1, lsl #8\n\t"
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/external/webkit/Source/JavaScriptCore/assembler/ |
ARMAssembler.h | 638 static ARMWord lsl(int reg, ARMWord value) function in class:JSC::ARMAssembler
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ARMv7Assembler.h | 1171 void lsl(RegisterID rd, RegisterID rm, int32_t shiftAmount) function in namespace:JSC::ARMRegisters 1179 void lsl(RegisterID rd, RegisterID rn, RegisterID rm) function in namespace:JSC::ARMRegisters [all...] |