| /dalvik/vm/mterp/x86/ |
| OP_MOVE_WIDE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
6 GET_VREG_WORD rINST %ecx 0 # rINSTw_WORD<- v[BBBB+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1]
|
| OP_MOVE_WIDE_FROM16.S | 4 movzwl 2(rPC),%ecx # ecx<- BBBB
6 GET_VREG_WORD rINST %ecx 0 # rINST<- v[BBBB+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1]
|
| OP_MOVE_FROM16.S | 5 movw 2(rPC),rINSTw # rINSTw <= BBBB
6 GET_VREG_R rINST rINST # rINST- fp[BBBB]
|
| OP_CONST_HIGH16.S | 3 movzwl 2(rPC),%eax # eax<- 0000BBBB
|
| OP_CONST_CLASS.S | 5 /* const/class vAA, Class@BBBB */
7 movzwl 2(rPC),%eax # eax<- BBBB
10 movl (%ecx,%eax,4),%eax # eax<- rResClasses[BBBB]
14 SET_VREG %eax rINST # vAA<- rResClasses[BBBB]
25 movzwl 2(rPC),%ecx # ecx<- BBBB
|
| OP_CONST_STRING.S | 5 /* const/string vAA, String@BBBB */
7 movzwl 2(rPC),%eax # eax<- BBBB
10 movl (%ecx,%eax,4),%eax # eax<- rResString[BBBB]
14 SET_VREG %eax rINST # vAA<- rResString[BBBB]
24 movzwl 2(rPC),%ecx # ecx<- BBBB
|
| OP_MOVE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
|
| OP_THROW_VERIFICATION_ERROR.S | 5 * exception is indicated by AA, with some detail provided by BBBB.
7 /* op AA, ref@BBBB */
9 movzwl 2(rPC),%eax # eax<- BBBB
12 movl %eax,OUT_ARG2(%esp) # arg2<- BBBB
|
| OP_CONST_WIDE_HIGH16.S | 3 movzwl 2(rPC),%eax # eax<- 0000BBBB
|
| OP_INVOKE_SUPER_QUICK.S | 10 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
22 movzwl 2(rPC),%eax # eax<- BBBB
25 movl (%ecx,%eax,4),%eax # eax<- super->vtable[BBBB]
|
| /dalvik/vm/mterp/x86-atom/ |
| OP_CONST_16.S | 26 * Format: AA|op BBBB (21s)
28 * Syntax: op vAA, #+BBBB
31 FETCHs 1, %edx # %edx<- BBBB
33 SET_VREG %edx rINST # vAA<- BBBB; literal
|
| OP_CONST_WIDE_HIGH16.S | 26 * Format: AA|op BBBB (21h)
31 FETCH 1, %ecx # %ecx<- 0000BBBB (zero-extended)
|
| OP_THROW_VERIFICATION_ERROR.S | 24 * The exception is indicated by AA with details provided by BBBB.
26 * Format: AA|op BBBB (21c)
28 * Syntax: op vAA, ref@BBBB
34 FETCH 1, %eax # %eax<- BBBB
35 movl %eax, -4(%esp) # push parameter BBBB; ref
|
| OP_CONST_HIGH16.S | 26 * Format: AA|op BBBB (21h)
31 FETCH 1, %ecx # %ecx<- 0000BBBB (zero-extended)
|
| OP_CONST_STRING.S | 24 * index into the specified register. vAA <- pResString[BBBB]
26 * Format: AA|op BBBB (21c)
28 * Syntax: op vAA, string@BBBB
31 FETCH 1, %ecx # %ecx<- BBBB
35 movl (%eax, %ecx, 4), %eax # %eax<- pResStrings[BBBB]
38 SET_VREG %eax, rINST # vAA<- %eax; pResString[BBBB]
46 * %ecx: BBBB (Class ref)
63 SET_VREG %eax, rINST # vAA<- %eax; pResString[BBBB]
|
| OP_MOVE_16.S | 26 * Format: ии|op AAAA BBBB (32x)
31 FETCH 2, %edx # %edx<- BBBB
|
| OP_MOVE_FROM16.S | 26 * Format: AA|op BBBB (22x)
31 FETCH 1, %edx # %edx<- BBBB
|
| OP_MOVE_WIDE_16.S | 26 * Format: ии|op AAAA BBBB (32x)
31 FETCH 2, %edx # %edx<- BBBB
|
| OP_MOVE_WIDE_FROM16.S | 25 * Format: AA|op BBBB (22x)
30 FETCH 1, %edx # %edx<- BBBB
|
| /dalvik/vm/mterp/armv5te/ |
| OP_MOVE_16.S | 4 FETCH(r1, 2) @ r1<- BBBB
7 GET_VREG(r2, r1) @ r2<- fp[BBBB]
|
| OP_MOVE_FROM16.S | 4 FETCH(r1, 1) @ r1<- BBBB
7 GET_VREG(r2, r1) @ r2<- fp[BBBB]
|
| OP_MOVE_WIDE_16.S | 4 FETCH(r3, 2) @ r3<- BBBB
6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB]
8 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
|
| OP_MOVE_WIDE_FROM16.S | 4 FETCH(r3, 1) @ r3<- BBBB
6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB]
8 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
|
| OP_THROW_VERIFICATION_ERROR.S | 5 * exception is indicated by AA, with some detail provided by BBBB.
7 /* op AA, ref@BBBB */
9 FETCH(r2, 1) @ r2<- BBBB
|
| OP_INVOKE_VIRTUAL_QUICK.S | 10 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
12 FETCH(r1, 1) @ r1<- BBBB
22 ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
|
