| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 111 unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
114 // FrameIndex with base register with BasePtr. Add an offset to the
116 MI.getOperand(i).ChangeToRegister(BasePtr, false);
|
| /external/llvm/lib/CodeGen/ |
| ShadowStackGC.cpp | 67 IRBuilder<> &B, Value *BasePtr,
70 IRBuilder<> &B, Value *BasePtr,
350 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr,
355 Value* Val = B.CreateGEP(BasePtr, Indices, Name);
363 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr,
367 Value *Val = B.CreateGEP(BasePtr, Indices, Name);
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 83 /// BasePtr - ARM physical register used as a base ptr in complex stack
86 unsigned BasePtr;
157 unsigned getBaseRegister() const { return BasePtr; }
|
| Thumb1FrameLowering.cpp | 62 unsigned BasePtr = RegInfo->getBaseRegister();
190 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
|
| ARMBaseRegisterInfo.cpp | 61 BasePtr(ARM::R6) {
100 Reserved.set(BasePtr);
[all...] |
| Thumb1RegisterInfo.cpp | 624 FrameReg = BasePtr;
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 181 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW);
201 MI.getOperand(i).ChangeToRegister(BasePtr, false);
218 MI.getOperand(i).ChangeToRegister(BasePtr, false);
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | 483 Value *BasePtr =
488 if (mayLoopAccessLocation(BasePtr, AliasAnalysis::ModRef,
493 deleteIfDeadInstruction(BasePtr, *SE);
515 NewCall = Builder.CreateMemSet(BasePtr, SplatValue,NumBytes,StoreAlignment);
532 NewCall = Builder.CreateCall3(MSP, BasePtr, PatternPtr, NumBytes);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 408 SDValue BasePtr = LD->getBasePtr();
414 IsWordAlignedBasePlusConstantOffset(BasePtr, Base, Offset)) {
419 return DAG.getLoad(getPointerTy(), DL, Chain, BasePtr,
452 BasePtr, LD->getPointerInfo(), MVT::i16,
454 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
470 // Lower to a call to __misaligned_load(BasePtr).
476 Entry.Node = BasePtr;
508 SDValue BasePtr = ST->getBasePtr();
516 SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr,
520 SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 608 unsigned BasePtr;
613 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
615 BasePtr = StackPtr;
617 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr);
621 MI.getOperand(i).ChangeToRegister(BasePtr, false);
|
| /external/clang/lib/CodeGen/ |
| CGClass.cpp | 584 llvm::Type *BasePtr = CGF.ConvertType(BaseElementTy);
585 BasePtr = llvm::PointerType::getUnqual(BasePtr);
587 BasePtr);
[all...] |
| /external/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 641 APInt BasePtr(BitWidth, 0);
645 BasePtr = Base->getValue().zextOrTrunc(BitWidth);
646 if (Ptr->isNullValue() || BasePtr != 0) {
647 Constant *C = ConstantInt::get(Ptr->getContext(), Offset+BasePtr);
[all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
| BitcodeReader.cpp | [all...] |
