HomeSort by relevance Sort by last modified time
    Searched refs:Cases (Results 1 - 20 of 20) sorted by null

  /external/clang/lib/Frontend/
FrontendOptions.cpp 18 .Cases("S", "s", IK_Asm)
23 .Cases("mm", "M", IK_ObjCXX)
26 .Cases("C", "cc", "cp", IK_CXX)
27 .Cases("cpp", "CPP", "c++", "cxx", "hpp", IK_CXX)
30 .Cases("ll", "bc", IK_LLVM_IR)
  /external/llvm/lib/Transforms/Utils/
LowerSwitch.cpp 67 unsigned Clusterify(CaseVector& Cases, SwitchInst *SI);
235 // Clusterify - Transform simple list of Cases into list of CaseRange's
236 unsigned LowerSwitch::Clusterify(CaseVector& Cases, SwitchInst *SI) {
239 // Start with "simple" cases
241 Cases.push_back(CaseRange(SI->getSuccessorValue(i),
244 std::sort(Cases.begin(), Cases.end(), CaseCmp());
247 if (Cases.size()>=2)
248 for (CaseItr I=Cases.begin(), J=llvm::next(Cases.begin()); J!=Cases.end(); )
    [all...]
SimplifyCFG.cpp 59 std::vector<std::pair<ConstantInt*, BasicBlock*> > &Cases);
356 // If this is an icmp against a constant, handle this as one of the cases.
475 /// decode all of the 'cases' that it represents and return the 'default' block.
479 BasicBlock*> > &Cases) {
481 Cases.reserve(SI->getNumCases());
483 Cases.push_back(std::make_pair(SI->getCaseValue(i), SI->getSuccessor(i)));
489 Cases.push_back(std::make_pair(GetConstantInt(ICI->getOperand(1), TD),
499 std::vector<std::pair<ConstantInt*, BasicBlock*> > &Cases) {
500 for (unsigned i = 0, e = Cases.size(); i != e; ++i)
501 if (Cases[i].second == BB)
    [all...]
  /external/llvm/include/llvm/ADT/
StringSwitch.h 10 // statement whose cases are string literals.
22 /// \brief A switch()-like statement whose cases are string literals.
38 /// .Cases("violet", "purple", Violet)
85 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1],
91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1],
97 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1],
104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1],
  /external/clang/test/Sema/
warn-unreachable.c 102 enum Cases { C1, C2, C3 };
103 int test_enum_cases(enum Cases C) {
return.c 247 // Test that for switch(enum) that if the switch statement covers all the cases
249 enum Cases { C1, C2, C3, C4 };
250 int test_enum_cases(enum Cases C) {
  /external/llvm/utils/TableGen/
DAGISelMatcherOpt.cpp 446 SmallVector<std::pair<const SDNodeInfo*, Matcher*>, 8> Cases;
451 Cases.push_back(std::make_pair(&COM->getOpcode(), COM->getNext()));
454 MatcherPtr.reset(new SwitchOpcodeMatcher(&Cases[0], Cases.size()));
461 SmallVector<std::pair<MVT::SimpleValueType, Matcher*>, 8> Cases;
473 Matcher *PrevMatcher = Cases[Entry-1].second;
481 Cases[Entry-1].second = new ScopeMatcher(Entries, 2);
485 Entry = Cases.size()+1;
486 Cases.push_back(std::make_pair(CTMTy, MatcherWithoutCTM));
489 if (Cases.size() != 1)
    [all...]
DAGISelMatcher.cpp 150 for (unsigned i = 0, e = Cases.size(); i != e; ++i) {
151 OS.indent(indent) << "case " << Cases[i].first->getEnumName() << ":\n";
152 Cases[i].second->print(OS, indent+2);
165 for (unsigned i = 0, e = Cases.size(); i != e; ++i) {
166 OS.indent(indent) << "case " << getEnumName(Cases[i].first) << ":\n";
167 Cases[i].second->print(OS, indent+2);
DAGISelMatcher.h 470 /// to one matcher per opcode. If the opcode doesn't match any of the cases,
474 SmallVector<std::pair<const SDNodeInfo*, Matcher*>, 8> Cases;
476 SwitchOpcodeMatcher(const std::pair<const SDNodeInfo*, Matcher*> *cases,
478 : Matcher(SwitchOpcode), Cases(cases, cases+numcases) {}
484 unsigned getNumCases() const { return Cases.size(); }
486 const SDNodeInfo &getCaseOpcode(unsigned i) const { return *Cases[i].first; }
487 Matcher *getCaseMatcher(unsigned i) { return Cases[i].second; }
488 const Matcher *getCaseMatcher(unsigned i) const { return Cases[i].second;
    [all...]
AsmWriterEmitter.cpp 331 // Compute the number of bits we need to represent these cases, this is
392 // Compute the number of bits we need to represent these cases, this is
419 // Print out all the cases.
925 std::string Cases;
926 raw_string_ostream CasesO(Cases);
    [all...]
AsmMatcherEmitter.cpp 72 // instruction (we currently ignore cases where this isn't true, whee!!!),
294 /// generated by the match. In cases (like addressing modes) where a single
    [all...]
  /external/clang/lib/StaticAnalyzer/Checkers/
IteratorsChecker.cpp 179 .Cases("vector", "deque", VectorKind)
195 .Cases("iterator",
283 // Need to handle three cases: MemberCall, copy, copy with addition.
305 .Cases("begin", "insert", "erase", true).Default(false)) {
589 .Cases("insert", "reserve", "push_back", true)
590 .Cases("erase", "pop_back", "clear", "resize", true)
CStringChecker.cpp 794 // cases. Is it ever valid to store to these?
    [all...]
CheckSecuritySyntaxOnly.cpp 108 .Cases("strcpy", "__strcpy_chk", &WalkAST::checkCall_strcpy)
109 .Cases("strcat", "__strcat_chk", &WalkAST::checkCall_strcat)
  /external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.h 200 size_t Clusterify(CaseVector &Cases, const SwitchInst &SI);
276 Parent(P), Default(D), Cases(C) { }
285 BitTestInfo Cases;
413 bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
SelectionDAGBuilder.cpp 301 // Handle cases such as i8 -> <1 x i1>
    [all...]
SelectionDAGISel.cpp 652 // but there are currently some corner cases that it misses. Also, this
    [all...]
  /external/clang/lib/Basic/
Targets.cpp     [all...]
  /external/clang/lib/Driver/
ToolChains.cpp 129 .Cases("armv7a", "armv7-a", "armv7")
130 .Cases("armv7r", "armv7-r", "armv7")
131 .Cases("armv7m", "armv7-m", "armv7")
137 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "arm926ej-s","armv5")
138 .Cases("arm10e", "arm10tdmi", "armv5")
139 .Cases("arm1020t", "arm1020e", "arm1022e", "arm1026ej-s", "armv5")
141 .Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s",
143 .Cases("cortex-a8", "cortex-r4", "cortex-m3", "cortex-a9", "armv7")
    [all...]
Tools.cpp 454 .Cases("armv2", "armv2a","arm2")
457 .Cases("armv4", "armv4t", "arm7tdmi")
458 .Cases("armv5", "armv5t", "arm10tdmi")
459 .Cases("armv5e", "armv5te", "arm1026ejs")
461 .Cases("armv6", "armv6k", "arm1136jf-s")
463 .Cases("armv6z", "armv6zk", "arm1176jzf-s")
465 .Cases("armv7", "armv7a", "armv7-a", "cortex-a8")
466 .Cases("armv7r", "armv7-r", "cortex-r4")
467 .Cases("armv7m", "armv7-m", "cortex-m3")
471 .Cases("armv6m", "armv6-m", "cortex-m0"
    [all...]

Completed in 302 milliseconds