| /external/clang/test/CXX/special/class.inhctor/ |
| p3.cpp | 27 struct D3 : B3 { // expected-note 2 {{candidate constructor}}
30 D3 fd3() { return 1; } // expected-error {{no viable conversion}}
|
| /external/clang/test/SemaTemplate/ |
| elaborated-type-specifier.cpp | 7 // expected-error{{no enum named 'X' in 'PR6915::D3'}}
16 struct D3 { };
20 template class D<D3>; // expected-note{{in instantiation of}}
|
| /external/clang/test/SemaCXX/ |
| conversion-delete-expr.cpp | 54 struct D3 : A3, B3 {
57 void f3 (D3 d)
59 delete d; // expected-error {{ambiguous conversion of delete expression of type 'D3' to a pointer}}
|
| /frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| syn_filt_neon.s | 45 VLD1.S16 {D0, D1, D2, D3}, [r4]! @load 16 mems
46 VST1.S16 {D0, D1, D2, D3}, [r5]! @store 16 mem[] to *yy
53 VLD1.S16 {D0, D1, D2, D3}, [r0]! @ load a[1] ~ a[16]
57 VREV64.16 D3, D3
71 VMULL.S16 Q5, D3, D4
96 VLD1.S16 {D0, D1, D2, D3}, [r5]!
97 VST1.S16 {D0, D1, D2, D3}, [r3]!
|
| Dot_p_neon.s | 50 VMLAL.S16 Q15, D19, D3
63 VMLAL.S16 Q15, D3, D15
72 VMLAL.S16 Q15, D7, D3
83 VMLAL.S16 Q15, D3, D3
103 VMLAL.S16 Q15, D3, D3
|
| Filt_6k_7k_neon.s | 42 VLD1.S16 {D0, D1, D2, D3}, [r0]!
45 VST1.S16 {D0, D1, D2, D3}, [r1]!
105 VMLAL.S16 Q10,D11,D3[0]
107 VMLAL.S16 Q12,D12,D3[0]
127 VMLAL.S16 Q10,D11,D3[1]
129 VMLAL.S16 Q12,D12,D3[1]
149 VMLAL.S16 Q10,D11,D3[2]
151 VMLAL.S16 Q12,D12,D3[2]
171 VMLAL.S16 Q10,D11,D3[3]
173 VMLAL.S16 Q12,D12,D3[3]
[all...] |
| Syn_filt_32_neon.s | 52 VLD1.S16 {D0, D1, D2, D3}, [r0]! @a[1] ~ a[16]
61 VREV64.16 D3, D3
68 VMULL.S16 Q10, D8, D3
82 VMULL.S16 Q11, D4, D3
|
| residu_asm_neon.s | 36 VLD1.S16 {D0, D1, D2, D3}, [r0]! @get all a[]
93 VQDMLAL.S16 Q10, D5, D3[0]
97 VQDMLAL.S16 Q10, D5, D3[1]
101 VQDMLAL.S16 Q10, D5, D3[2]
105 VQDMLAL.S16 Q10, D5, D3[3]
|
| Norm_Corr_neon.s | 81 VMLAL.S16 Q10, D3, D3
126 VMLAL.S16 Q10, D3, D3
127 VMLAL.S16 Q11, D3, D11
147 VMLAL.S16 Q10, D3, D3
148 VMLAL.S16 Q11, D3, D11
|
| scale_sig_neon.s | 55 VSHLL.S16 Q13, D3, #16
75 VSHLL.S16 Q11, D3, #16
|
| /frameworks/base/tests/RenderScriptTests/tests/src/com/android/rs/test/ |
| UT_vector.java | 67 Double3 D3 = s.get_d3();
68 if (D3.x != 1.0 || D3.y != 2.0 || D3.z != 3.0) {
71 D3.x = 2.99;
72 D3.y = 3.99;
73 D3.z = 4.99;
74 s.set_d3(D3);
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_TransformResidual4x4_s.s | 62 dIn3 DN D3.S16
75 df3 DN D3.S16
89 dh3 DN D3.S16
124 VSUB de2,dIn1RS,dIn3 ;// e2 = (d1>>1) - d3
125 VADD de3,dIn1,dIn3RS ;// e3 = d1 + (d3>>1)
151 VSUB dg2,df1RS,df3 ;// e2 = (d1>>1) - d3
152 VADD dg3,df1,df3RS ;// e3 = d1 + (d3>>1)
|
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 127 dSrcRow3 DN D3.I16
131 dDqntRow3 DN D3.I16
139 dIn3 DN D3.S16
154 df3 DN D3.S16
168 dh3 DN D3.S16
175 dDeltaRow3 DN D3.S16
298 VSUB de2,dIn1RS,dIn3 ;// e2 = (d1>>1) - d3
299 VADD de3,dIn1,dIn3RS ;// e3 = d1 + (d3>>1)
325 VSUB dg2,df1RS,df3 ;// e2 = (d1>>1) - d3
326 VADD dg3,df1,df3RS ;// e3 = d1 + (d3>>1)
[all...] |
| omxVCM4P10_PredictIntraChroma_8x8_s.s | 75 dLeftVal3 DN D3.8
89 dSumAboveValU32 DN D3.U32
90 dSumAboveValU8 DN D3.U8
106 dRevAboveVal DN D3.U8
107 dRevAboveValU64 DN D3.U64
119 dRevLeftVal DN D3.U8
120 dRevLeftValU64 DN D3.U64
128 dVerPred DN D3.S16
129 dHVValS16 DN D3.S16
130 dHVValS32 DN D3.S3
[all...] |
| omxVCM4P10_TransformDequantLumaDCFromPair_s.s | 68 dIn3 DN D3.S16
80 dRowOp3 DN D3.S16
94 dColOp3 DN D3.S16
108 dOut3 DN D3.S16
|
| omxVCM4P10_PredictIntra_4x4_s.s | 74 dLeftVal3 DN D3.8
78 dLeftVal3U32 DN D3.U32
107 dAbove0 DN D3.U8
125 dEven0 DN D3.U8
144 dLeftHU0 DN D3.U8
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 14 D3:
725 // CHECK: ('_string', 'D3')
|
| x86_64-symbols.s | 14 D3:
682 // CHECK: ('_string', 'D3')
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/comm/src/ |
| omxVCCOMM_Copy8x8_s.s | 40 X3 DN D3.S8
|
| omxVCCOMM_Copy16x16_s.s | 39 X3 DN D3.S8
|
| /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| armVCM4P2_Clip8_s.s | 36 dx11 DN D3.S16
|
| omxVCM4P2_QuantInvInter_I_s.s | 80 dCoeff1 DN D3.S16
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 386 unsigned &D1, unsigned &D2, unsigned &D3) {
391 D3 = TRI->getSubReg(Reg, ARM::dsub_3);
396 D3 = TRI->getSubReg(Reg, ARM::dsub_6);
402 D3 = TRI->getSubReg(Reg, ARM::dsub_7);
423 unsigned D0, D1, D2, D3;
424 GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3);
430 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
496 unsigned D0, D1, D2, D3;
497 GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
502 MIB.addReg(D3);
[all...] |
| /external/speex/libspeex/ |
| math_approx.h | 248 #define D3 1301
260 frac = ADD16(D0, MULT16_16_Q14(frac, ADD16(D1, MULT16_16_Q14(frac, ADD16(D2 , MULT16_16_Q14(D3,frac))))));
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsBaseInfo.h | 43 case Mips::D3:
|
