| /external/llvm/include/llvm/Support/ |
| Solaris.h | 30 #undef ESP
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.h | 46 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
|
| X86MCTargetDesc.cpp | 203 case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH:
204 return N86::ESP;
221 return N86::ESP;
374 // Initial state of the frame pointer is esp+stackGrowth.
376 MachineLocation Src(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
380 MachineLocation CSDst(is64Bit ? X86::RSP : X86::ESP, stackGrowth);
|
| X86MCCodeEmitter.cpp | 286 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
289 BaseRegNo != N86::ESP &&
300 // If the base is not EBP/ESP and there is no displacement, use simple
324 assert(IndexReg.getReg() != X86::ESP &&
325 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
363 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
371 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| /external/libpcap/ |
| tokdefs.h | 89 ESP = 315,
193 #define ESP 315
|
| grammar.c | 124 ESP = 315,
228 #define ESP 315
789 "RSH", "LEN", "IPV6", "ICMPV6", "AH", "ESP", "VLAN", "MPLS", "PPPOED",
[all...] |
| grammar.y | 181 %token IPV6 ICMPV6 AH ESP
360 | ESP { $$ = Q_ESP; }
|
| scanner.l | 203 esp return ESP;
|
| scanner.c | [all...] |
| /external/qemu/distrib/sdl-1.2.12/src/hermes/ |
| mmx_main.asm | 19 ;; [ESP+8] ConverterInfo*
35 mov ebp,esp
|
| x86_main.asm | 21 ;; [ESP+8] ConverterInfo*
37 mov ebp,esp
|
| /external/qemu/target-i386/ |
| exec.h | 41 #define ESP (env->regs[R_ESP])
300 ESP = env->regs[R_ESP];
328 env->regs[R_ESP] = ESP;
|
| op_helper.c | 385 stl_kernel(env->tr.base + (0x28 + 4 * 4), ESP);
399 stw_kernel(env->tr.base + (0x12 + 4 * 2), ESP);
451 ESP = new_regs[4];
617 ESP = (ESP & ~0xffff) | ((val) & 0xffff);\
619 ESP = (uint32_t)(val);\
621 ESP = (val);\
624 #define SET_ESP(val, sp_mask) ESP = (ESP & ~(sp_mask)) | ((val) & (sp_mask))
664 uint32_t e1, e2, offset, ss = 0, esp, ss_e1 = 0, ss_e2 = 0 local
890 target_ulong old_eip, esp, offset; local
1133 uint32_t offset, esp; local
1954 uint32_t esp_mask, esp, ebp; local
1986 target_ulong esp, ebp; local
2290 uint32_t esp, esp_mask; local
[all...] |
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 89 GENOFFSET(X86,x86,ESP);
|
| /external/oprofile/events/i386/nehalem/ |
| unit_masks | 312 0x04 esp_folding Counts number of stack pointer (ESP) instructions decoded: push , pop , call , ret, etc
313 0x08 esp_sync Counts number of stack pointer (ESP) sync operations where an ESP instruction is corrected by adding the ESP offset register to the current value of the ESP register
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 73 StackPtr = X86::ESP;
395 Reserved.set(X86::ESP);
529 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
530 // adjcallstackdown instruction into 'add ESP, <amt>'
695 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
732 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
768 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
769 return X86::ESP;
804 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
|
| X86FrameLowering.cpp | 333 // movl %esp, %ebp
571 // Encode the offset to the nnnnnn value in the 'subl $nnnnnn, ESP'
790 // If there is an SUB32ri of ESP immediately before this instruction, merge
795 // If there is an ADD32ri or SUB32ri of ESP immediately after this
799 // Adjust stack pointer: ESP -= numbytes.
[all...] |
| X86CodeEmitter.cpp | 498 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
501 BaseRegNo != N86::ESP &&
512 // If the base is not EBP/ESP and there is no displacement, use simple
535 assert(IndexReg.getReg() != X86::ESP &&
536 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
571 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
580 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| X86AsmPrinter.cpp | 309 assert(IndexReg.getReg() != X86::ESP &&
310 "X86 doesn't allow scaling by ESP");
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 147 ENTRY(ESP) \
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-x86-linux.c | 376 SC2(esp,ESP);
468 Addr esp = esp_top_of_frame; local
476 esp -= sizeof(*frame);
477 esp = VG_ROUNDDN(esp, 16);
478 frame = (struct sigframe *)esp;
480 if (!extend(tst, esp, sizeof(*frame)))
485 esp, offsetof(struct sigframe, vg) );
509 esp, offsetof(struct sigframe, vg) )
526 Addr esp = esp_top_of_frame; local
590 Addr esp; local
698 Addr esp; local
[all...] |
| /external/qemu-pc-bios/bochs/ |
| bochs.h | 58 #undef ESP
|
| /external/zlib/contrib/masm686/ |
| match.asm | 106 ; be manually constructed and referenced relative to the ESP register.
140 sub esp,varsize
147 mov edx, [esp+deflatestate]
150 mov ecx, [esp+curmatch]
175 mov [esp+chainlenwmask], ebx
185 mov [esp+nicematch], ebx
190 mov [esp+window], esi
193 mov [esp+scan],edi
201 mov [esp+scanalign], eax
216 mov [esp+bestlen], eax
[all...] |
| /prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/lib/gcc/i686-unknown-linux-gnu/4.2.1/include/xorg/ |
| assyntax.h | 141 #define ESP sp
203 #define ESP %esp
[all...] |
| /external/qemu/ |
| cpu-exec.c | 31 #undef ESP
[all...] |
