/external/llvm/include/llvm/Target/ |
TargetSelectionDAGInfo.h | 59 SDValue Op1, SDValue Op2, 76 SDValue Op1, SDValue Op2, 92 SDValue Op1, SDValue Op2,
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/system/core/libpixelflinger/codeflinger/ |
ARMAssemblerInterface.h | 116 uint32_t Op2) = 0; 216 ADC(int cc, int s, int Rd, int Rn, uint32_t Op2) { 217 dataProcessing(opADC, cc, s, Rd, Rn, Op2); 220 ADD(int cc, int s, int Rd, int Rn, uint32_t Op2) { 221 dataProcessing(opADD, cc, s, Rd, Rn, Op2); 224 AND(int cc, int s, int Rd, int Rn, uint32_t Op2) { 225 dataProcessing(opAND, cc, s, Rd, Rn, Op2); 228 BIC(int cc, int s, int Rd, int Rn, uint32_t Op2) { 229 dataProcessing(opBIC, cc, s, Rd, Rn, Op2); 232 EOR(int cc, int s, int Rd, int Rn, uint32_t Op2) { [all...] |
ARMAssembler.h | 62 uint32_t Op2);
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ARMAssemblerProxy.h | 52 uint32_t Op2);
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ARMAssemblerProxy.cpp | 70 int Rd, int Rn, uint32_t Op2) 72 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2);
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ARMAssembler.cpp | 212 int s, int Rd, int Rn, uint32_t Op2) 214 *mPC++ = (cc<<28) | (opcode<<21) | (s<<20) | (Rn<<16) | (Rd<<12) | Op2;
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/external/llvm/lib/Target/PTX/ |
PTXSelectionDAGInfo.h | 44 SDValue Op1, SDValue Op2,
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PTXInstrInfo.h | 121 SDValue Op1, SDValue Op2);
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PTXISelLowering.cpp | 151 SDValue Op2 = Op.getOperand(2); 166 return DAG.getNode(ISD::SETCC, dl, MVT::i1, Op0, Op1, Op2);
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PTXInstrInfo.cpp | 329 DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2) { 332 SDValue ops[] = { Op1, Op2, predReg, predOp };
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/external/llvm/lib/Target/ARM/ |
ARMSelectionDAGInfo.h | 60 SDValue Op1, SDValue Op2,
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ARMFastISel.cpp | 122 unsigned Op2, bool Op2IsKill); 332 unsigned Op2, bool Op2IsKill) { 340 .addReg(Op2, Op2IsKill * RegState::Kill)); 345 .addReg(Op2, Op2IsKill * RegState::Kill)); [all...] |
/external/llvm/lib/Target/PTX/InstPrinter/ |
PTXInstPrinter.cpp | 143 const MCOperand &Op2 = MI->getOperand(OpNo+1); 145 if (Op2.getImm() == 0) 147 O << "+" << Op2.getImm();
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/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | 484 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, 490 Ops.push_back(Op2); 708 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 709 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 711 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 713 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 725 SDValue Op1, SDValue Op2); 727 SDValue Op1, SDValue Op2, SDValue Op3); [all...] |
ISDOpcodes.h | [all...] |
FastISel.h | 264 unsigned Op2, bool Op2IsKill);
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/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 827 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; 828 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) { 832 delete &Op2; 840 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; 841 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) { 845 delete &Op2; 854 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; 855 if (isSrcOp(Op) && isDstOp(Op2)) { 859 delete &Op2; [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 393 SDValue Op2 = Op.getOperand(2); 408 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); 415 Op2 = DAG.getNode(ISD::AND, DL, VT, Op2, NotMask); 416 return DAG.getNode(ISD::OR, DL, VT, Op1, Op2);
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SelectionDAG.cpp | 259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 717 SDValue Op1, SDValue Op2, 722 SDValue Ops[] = { Op1, Op2 }; [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/include/llvm/Analysis/ |
ScalarEvolution.h | 573 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, 578 Ops.push_back(Op2); 591 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, 596 Ops.push_back(Op2); [all...] |
/external/llvm/lib/Analysis/ |
ConstantFolding.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelDAGToDAG.cpp | 246 SDValue Op2 = Node->getOperand(1); 251 SDNode *Mul = CurDAG->getMachineNode(Op, dl, MVT::Glue, Op1, Op2);
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/external/llvm/lib/AsmParser/ |
LLParser.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineCompares.cpp | [all...] |