/frameworks/base/tests/RenderScriptTests/tests/src/com/android/rs/test/ |
UT_alloc.java | 17 package com.android.rs.test; 31 private void initializeGlobals(RenderScript RS, ScriptC_alloc s) { 32 Type.Builder typeBuilder = new Type.Builder(RS, Element.I32(RS)); 40 Allocation A = Allocation.createTyped(RS, typeBuilder.create()); 43 typeBuilder = new Type.Builder(RS, Element.I32(RS)); 45 Allocation AFaces = Allocation.createTyped(RS, typeBuilder.create()); 48 Allocation ALOD = Allocation.createTyped(RS, typeBuilder.create()); 51 Allocation AFacesLOD = Allocation.createTyped(RS, typeBuilder.create()) [all...] |
UT_foreach.java | 17 package com.android.rs.test; 32 private void initializeGlobals(RenderScript RS, ScriptC_foreach s) { 33 Type.Builder typeBuilder = new Type.Builder(RS, Element.I32(RS)); 39 A = Allocation.createTyped(RS, typeBuilder.create());
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UT_refcount.java | 17 package com.android.rs.test; 31 private void initializeGlobals(RenderScript RS, ScriptC_refcount s) { 32 Type.Builder typeBuilder = new Type.Builder(RS, Element.I32(RS)); 36 Allocation A = Allocation.createTyped(RS, typeBuilder.create());
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/external/clang/lib/StaticAnalyzer/Checkers/ |
ReturnUndefChecker.cpp | 30 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; 34 void ReturnUndefChecker::checkPreStmt(const ReturnStmt *RS, 37 const Expr *RetE = RS->getRetValue();
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ReturnPointerRangeChecker.cpp | 30 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; 34 void ReturnPointerRangeChecker::checkPreStmt(const ReturnStmt *RS, 38 const Expr *RetE = RS->getRetValue();
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/external/llvm/lib/Target/PowerPC/ |
PPCRegisterInfo.h | 54 int SPAdj, RegScavenger *RS) const; 56 int SPAdj, RegScavenger *RS) const; 58 int SPAdj, RegScavenger *RS = NULL) const;
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PPCJITInfo.cpp | 27 #define BUILD_ADDIS(RD,RS,IMM16) \ 28 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535)) 29 #define BUILD_ORI(RD,RS,UIMM16) \ 30 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535)) 31 #define BUILD_ORIS(RD,RS,UIMM16) \ 32 ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535)) 33 #define BUILD_RLDICR(RD,RS,SH,ME) \ 34 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \ 36 #define BUILD_MTSPR(RS,SPR) \ 37 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1) [all...] |
/external/qemu/ |
ppc-dis.c | 84 /* Opcode is defined for the POWER (RS/6000) architecture. */ 729 the RS field in the instruction. This is used for extended 734 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form 737 #define RS RBS + 1 738 #define RT RS 742 /* The RS and RT fields of the DS form stq instruction, which have 744 #define RSQ RS + 1 748 /* The RS field of the tlbwe instruction, which is optional. */ [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPURegisterInfo.h | 75 RegScavenger *RS = NULL) const; 94 RegScavenger *RS,
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SPUFrameLowering.h | 44 RegScavenger *RS = NULL) const;
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/packages/wallpapers/Basic/src/com/android/wallpaper/fall/ |
FallView.java | 40 RenderScriptGL RS = createRenderScriptGL(sc); 42 mRender.init(RS, getResources(), false);
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/packages/wallpapers/Basic/src/com/android/wallpaper/galaxy/ |
GalaxyView.java | 37 RenderScriptGL RS = createRenderScriptGL(sc); 39 render.init(RS, getResources(), false);
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/packages/wallpapers/Basic/src/com/android/wallpaper/grass/ |
GrassView.java | 37 RenderScriptGL RS = createRenderScriptGL(sc); 39 render.init(RS, getResources(), false);
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/external/llvm/lib/Target/Blackfin/ |
BlackfinFrameLowering.h | 42 RegScavenger *RS) const;
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/external/llvm/lib/Target/MBlaze/ |
MBlazeFrameLowering.h | 48 RegScavenger *RS) const;
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MBlazeRegisterInfo.h | 59 int SPAdj, RegScavenger *RS = NULL) const;
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/external/llvm/lib/Target/Mips/ |
MipsFrameLowering.h | 44 RegScavenger *RS) const;
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MipsRegisterInfo.h | 55 int SPAdj, RegScavenger *RS = NULL) const;
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/external/llvm/lib/Target/PTX/ |
PTXRegisterInfo.h | 48 RegScavenger *RS = NULL) const;
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PTXRegisterInfo.cpp | 36 RegScavenger *RS) const {
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/external/llvm/lib/Target/Alpha/ |
AlphaRegisterInfo.h | 42 int SPAdj, RegScavenger *RS = NULL) const;
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/external/llvm/lib/Target/Sparc/ |
SparcRegisterInfo.h | 44 int SPAdj, RegScavenger *RS = NULL) const;
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/external/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.h | 48 int SPAdj, RegScavenger *RS = NULL) const;
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/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.h | 46 RegScavenger *RS = NULL) const;
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/external/qemu/tcg/ppc/ |
tcg-target.c | 396 #define RS(r) ((r)<<21) 408 #define SAB(s,a,b) (RS(s) | RA(a) | RB(b)) 453 tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff)); 477 tcg_out32 (s, MTSPR | RS (0) | CTR); 502 tcg_out32 (s, MTSPR | RS (arg) | LR); 558 | RS (addr_reg) 573 | RS (addr_reg) 605 tcg_out32 (s, EXTSB | RA (data_reg) | RS (3)); 608 tcg_out32 (s, EXTSH | RA (data_reg) | RS (3)); 672 tcg_out32 (s, EXTSB | RA (data_reg) | RS (data_reg)) [all...] |