| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.cpp | 75 // select_cc => setcc
77 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
78 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
79 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 336 SELECT_CC,
490 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
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| SelectionDAG.h | 579 return getNode(ISD::SELECT_CC, DL, True.getValueType(),
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 60 /// SELECT_CC - Operand 0 and operand 1 are selection variable, operand 3
62 SELECT_CC,
|
| MSP430ISelLowering.cpp | 119 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
120 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
190 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 125 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
126 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
127 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
128 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
167 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 95 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
512 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
590 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
611 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
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| LegalizeTypesGeneric.cpp | 471 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
473 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
|
| LegalizeVectorOps.cpp | 193 case ISD::SELECT_CC:
|
| LegalizeVectorTypes.cpp | 63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
239 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
421 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
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| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 68 case ISD::SELECT_CC: Res = PromoteIntRes_SELECT_CC(N); break;
499 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
773 case ISD::SELECT_CC: Res = PromoteIntOp_SELECT_CC(N, OpNo); break;
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| DAGCombiner.cpp | 495 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
508 if (N.getOpcode() == ISD::SELECT_CC &&
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| SelectionDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 50 case MBlazeISD::Select_CC : return "MBlazeISD::Select_CC";
129 // Expand SELECT_CC
130 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
144 AddPromotedToType(ISD::SELECT_CC, MVT::i1, MVT::i32);
203 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
225 case MBlaze::Select_CC:
351 // To "insert" a SELECT_CC instruction, we actually have to insert the
579 Opc = MBlazeISD::Select_CC;
583 llvm_unreachable("Cannot lower select_cc with unknown type")
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| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 731 // Sparc has no select or setcc: expand to SELECT_CC.
747 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
748 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
749 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 88 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
95 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
176 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 168 // Custom lower SELECT_CC for most cases, but expand by default
169 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
170 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
171 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
172 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
173 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
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| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 63 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 164 // PowerPC wants to turn select_cc of FP into fsel when possible.
165 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
166 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 76 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
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| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 123 setOperationAction(ISD::SELECT_CC, VT.getSimpleVT(), Expand);
514 setTargetDAGCombine(ISD::SELECT_CC);
691 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
692 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
693 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 150 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
204 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
722 // To "insert" a SELECT_CC instruction, we actually have to insert the
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