| /external/llvm/lib/Target/CellSPU/ |
| SPUHazardRecognizers.h | 33 virtual HazardType getHazardType(SUnit *SU, int Stalls);
34 virtual void EmitInstruction(SUnit *SU);
|
| SPUHazardRecognizers.cpp | 44 SPUHazardRecognizer::getHazardType(SUnit *SU, int Stalls)
52 const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
129 void SPUHazardRecognizer::EmitInstruction(SUnit *SU)
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | 189 /// IsReachable - Checks if SU is reachable from TargetSU.
190 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) {
191 return Topo.IsReachable(SU, TargetSU);
194 /// WillCreateCycle - Returns true if adding an edge from SU to TargetSU will
196 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) {
197 return Topo.WillCreateCycle(SU, TargetSU);
200 /// AddPred - adds a predecessor edge to SUnit SU.
203 void AddPred(SUnit *SU, const SDep &D) {
204 Topo.AddPred(SU, D.getSUnit());
205 SU->addPred(D)
[all...] |
| ScheduleDAGList.cpp | 81 void ReleaseSucc(SUnit *SU, const SDep &D);
82 void ReleaseSuccessors(SUnit *SU);
83 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
108 void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) {
121 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency());
129 void ScheduleDAGList::ReleaseSuccessors(SUnit *SU) {
131 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
136 ReleaseSucc(SU, *I);
143 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle)
[all...] |
| ScheduleDAGFast.cpp | 80 /// AddPred - adds a predecessor edge to SUnit SU.
82 void AddPred(SUnit *SU, const SDep &D) {
83 SU->addPred(D);
86 /// RemovePred - removes a predecessor edge from SUnit SU.
88 void RemovePred(SUnit *SU, const SDep &D) {
89 SU->removePred(D);
93 void ReleasePred(SUnit *SU, SDep *PredEdge);
94 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
121 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su
[all...] |
| ScheduleDAGSDNodes.h | 87 void InitVRegCycleFlag(SUnit *SU);
91 void InitNumRegDefsLeft(SUnit *SU);
95 virtual void ComputeLatency(SUnit *SU);
113 virtual void dumpNode(const SUnit *SU) const;
115 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
129 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
|
| ScheduleDAGSDNodes.cpp | 70 SUnit *SU = &SUnits.back();
75 SU->SchedulingPref = Sched::None;
77 SU->SchedulingPref = TLI.getSchedulingPreference(N);
78 return SU;
82 SUnit *SU = NewSUnit(Old->getNode());
83 SU->OrigNode = Old->OrigNode;
84 SU->Latency = Old->Latency;
85 SU->isVRegCycle = Old->isVRegCycle;
86 SU->isCall = Old->isCall;
87 SU->isCallOp = Old->isCallOp
[all...] |
| /external/llvm/lib/CodeGen/ |
| ScheduleDAGEmit.cpp | 35 void ScheduleDAG::EmitPhysRegCopy(SUnit *SU,
37 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
46 for (SUnit::const_succ_iterator II = SU->Succs.begin(),
47 EE = SU->Succs.end(); II != EE; ++II) {
59 unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
60 bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
|
| LatencyPriorityQueue.cpp | 54 /// of SU, return it, otherwise return null.
55 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) {
57 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
72 void LatencyPriorityQueue::push(SUnit *SU) {
76 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
78 if (getSingleUnscheduledPred(I->getSUnit()) == SU)
81 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking;
83 Queue.push_back(SU);
147 SUnit *su = q.pop(); local
[all...] |
| ScheduleDAGInstrs.cpp | 150 /// the exit SU to the register defs and use list. This is because we want to
245 SUnit *SU = NewSUnit(MI);
246 SU->isCall = MCID.isCall();
247 SU->isCommutable = MCID.isCommutable();
249 // Assign the Latency field of SU using target-provided information.
251 SU->Latency = 1;
253 ComputeLatency(SU);
279 if (DefSU != SU &&
282 DefSU->addPred(SDep(SU, Kind, AOLatency, /*Reg=*/Reg));
290 if (DefSU != SU &
[all...] |
| ScheduleDAG.cpp | 56 if (SUnit *SU = Sequence[i])
57 SU->dump(this);
173 SUnit *SU = WorkList.pop_back_val();
174 SU->isDepthCurrent = false;
175 for (SUnit::const_succ_iterator I = SU->Succs.begin(),
176 E = SU->Succs.end(); I != E; ++I) {
189 SUnit *SU = WorkList.pop_back_val();
190 SU->isHeightCurrent = false;
191 for (SUnit::const_pred_iterator I = SU->Preds.begin(),
192 E = SU->Preds.end(); I != E; ++I)
[all...] |
| ScoreboardHazardRecognizer.cpp | 108 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
118 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
157 DEBUG(dbgs() << "SU(" << SU->NodeNum << "): ");
158 DEBUG(DAG->dumpNode(SU));
170 void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
|
| ScheduleDAGPrinter.cpp | 77 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU,
79 return G->getGraphNodeLabel(SU);
|
| PostRASchedulerList.cpp | 170 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
171 void ReleaseSuccessors(SUnit *SU);
172 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
333 DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
334 SUnits[su].dumpAll(this));
536 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) {
551 // SuccSU->setDepthToAtLeast(SU->getDepth() + SuccEdge->getLatency());
566 /// ReleaseSuccessors - Call ReleaseSucc on each of SU's successors
[all...] |
| ScheduleDAGInstrs.h | 183 virtual void ComputeLatency(SUnit *SU);
206 virtual void dumpNode(const SUnit *SU) const;
208 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
|
| CriticalAntiDepBreaker.cpp | 157 /// CriticalPathStep - Return the next SUnit after SU on the bottom-up
159 static const SDep *CriticalPathStep(const SUnit *SU) {
163 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
435 const SUnit *SU = &SUnits[i];
436 MISUnitMap[SU->getInstr()] = SU;
437 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
438 Max = SU;
[all...] |
| AggressiveAntiDepBreaker.cpp | 277 /// in SU that we want to consider for breaking.
278 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) {
280 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
292 /// CriticalPathStep - Return the next SUnit after SU on the bottom-up
294 static const SUnit *CriticalPathStep(const SUnit *SU) {
298 if (SU != 0) {
299 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
741 const SUnit *SU = &SUnits[i]
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LatencyPriorityQueue.h | 57 void addNode(const SUnit *SU) {
61 void updateNode(const SUnit *SU) {
84 virtual void remove(SUnit *SU);
95 void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
96 SUnit *getSingleUnscheduledPred(SUnit *SU);
|
| ScheduleDAG.h | 159 void setSUnit(SUnit *SU) {
160 Dep.setPointer(SU);
440 virtual void addNode(const SUnit *SU) = 0;
441 virtual void updateNode(const SUnit *SU) = 0;
464 virtual void remove(SUnit *SU) = 0;
512 const MCInstrDesc *getInstrDesc(const SUnit *SU) const {
513 if (SU->isInstr()) return &SU->getInstr()->getDesc();
514 return getNodeDesc(SU->getNode());
529 virtual void dumpNode(const SUnit *SU) const = 0
[all...] |
| ScoreboardHazardRecognizer.h | 116 // Stalls provides an cycle offset at which SU will be scheduled. It will be
118 virtual HazardType getHazardType(SUnit *SU, int Stalls);
120 virtual void EmitInstruction(SUnit *SU);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.h | 33 virtual void EmitInstruction(SUnit *SU);
64 virtual HazardType getHazardType(SUnit *SU, int Stalls);
65 virtual void EmitInstruction(SUnit *SU);
|
| PPCHazardRecognizers.cpp | 26 void PPCHazardRecognizer440::EmitInstruction(SUnit *SU) {
27 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
34 ScoreboardHazardRecognizer::EmitInstruction(SU);
138 getHazardType(SUnit *SU, int Stalls) {
141 const SDNode *Node = SU->getNode()->getGluedMachineNode();
239 void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
240 const SDNode *Node = SU->getNode()->getGluedMachineNode();
|
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 45 virtual HazardType getHazardType(SUnit *SU, int Stalls);
47 virtual void EmitInstruction(SUnit *SU);
|
| ARMHazardRecognizer.cpp | 35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
38 MachineInstr *MI = SU->getInstr();
73 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls);
83 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) {
84 MachineInstr *MI = SU->getInstr();
108 ScoreboardHazardRecognizer::EmitInstruction(SU);
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| SimpleConstraintManager.h | 25 SubEngine &SU;
27 SimpleConstraintManager(SubEngine &subengine) : SU(subengine) {}
|
