/external/llvm/include/llvm/MC/ |
MCInstrItineraries.h | 198 /// itinerary class UseClass, operand index UseIdx. 200 unsigned UseClass, unsigned UseIdx) const { 210 if ((FirstUseIdx + UseIdx) >= LastUseIdx) 214 Forwardings[FirstUseIdx + UseIdx]; 221 unsigned UseClass, unsigned UseIdx) const { 229 int UseCycle = getOperandCycle(UseClass, UseIdx); 235 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx))
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/external/llvm/lib/Target/ |
TargetInstrInfo.cpp | 67 const MachineInstr *UseMI, unsigned UseIdx) const { 73 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); 79 SDNode *UseNode, unsigned UseIdx) const { 90 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
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/external/llvm/lib/CodeGen/ |
LiveRangeEdit.cpp | 81 /// OrigIdx are also available with the same value at UseIdx. 84 SlotIndex UseIdx, 87 UseIdx = UseIdx.getUseIndex(); 105 if (OVNI != li.getVNInfoAt(UseIdx)) 112 SlotIndex UseIdx, 136 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx, lis))
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LiveRangeEdit.h | 80 /// OrigIdx are also available with the same value at UseIdx. 82 SlotIndex UseIdx, LiveIntervals &lis); 156 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI. 159 SlotIndex UseIdx,
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SplitKit.h | 306 /// defFromParent - Define Reg from ParentVNI at UseIdx using either 310 SlotIndex UseIdx,
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InlineSpiller.cpp | 836 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getUseIndex(); 837 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); 846 DEBUG(dbgs() << UseIdx << '\t' << *MI); 858 if (!Edit->canRematerializeAt(RM, UseIdx, false, LIS)) { 860 DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI); 874 DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *MI); [all...] |
LiveIntervalAnalysis.cpp | [all...] |
MachineVerifier.cpp | 662 SlotIndex UseIdx = LiveInts->getInstructionIndex(MI).getUseIndex(); 665 if (!LI.liveAt(UseIdx)) { 667 *OS << UseIdx << " is not live in " << LI << '\n'; 671 if (MO->isKill() && !LI.killedAt(UseIdx.getDefIndex())) { [all...] |
RegisterCoalescer.cpp | 698 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); 699 LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); 750 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getUseIndex(); 751 LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); 768 SlotIndex DefIdx = UseIdx.getDefIndex(); [all...] |
VirtRegRewriter.cpp | [all...] |
SplitKit.cpp | 403 SlotIndex UseIdx, 416 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) { [all...] |
/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.h | 210 const MachineInstr *UseMI, unsigned UseIdx) const; 214 SDNode *UseNode, unsigned UseIdx) const; 233 unsigned UseIdx, unsigned UseAlign) const; 237 unsigned UseIdx, unsigned UseAlign) const; 242 unsigned UseIdx, unsigned UseAlign) const; 253 const MachineInstr *UseMI, unsigned UseIdx) const;
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ARMBaseInstrInfo.cpp | [all...] |
/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 645 const MachineInstr *UseMI, unsigned UseIdx) const; 649 SDNode *UseNode, unsigned UseIdx) const; 674 const MachineInstr *UseMI, unsigned UseIdx) const { [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 359 const MachineInstr *UseMI, unsigned UseIdx) const;
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X86InstrInfo.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
LiveIntervalAnalysis.h | 372 SlotIndex UseIdx) const;
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