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Searched
refs:VEX
(Results
1 - 5
of
5
) sorted by null
/external/valgrind/main/
Android.mk
38
external/valgrind/main/
VEX
/pub \
63
VEX
/priv/main_globals.c \
64
VEX
/priv/main_main.c \
65
VEX
/priv/main_util.c \
66
VEX
/priv/ir_defs.c \
67
VEX
/priv/ir_match.c \
68
VEX
/priv/ir_opt.c \
69
VEX
/priv/guest_generic_bb_to_IR.c \
70
VEX
/priv/guest_generic_x87.c \
71
VEX
/priv/guest_x86_helpers.c
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/external/valgrind/tsan/
Makefile
29
VG_INCLUDES=-I$(VALGRIND_ROOT) -I$(VALGRIND_ROOT)/include -I$(VALGRIND_ROOT)/
VEX
/pub -I$(STLPORT_ROOT)
119
$(VALGRIND_ROOT)/
VEX
/libvex-$(ARCHOS).a
Android.mk
37
external/valgrind/main/
VEX
/pub \
/external/llvm/lib/Target/X86/MCTargetDesc/
X86BaseInfo.h
380
///
VEX
- The opcode prefix used by AVX instructions
382
VEX
= 1U << 0,
394
/// operand 3 with
VEX
.vvvv.
402
/// VEX_L - Stands for a bit in the
VEX
opcode prefix meaning the current
408
// VEX_LIG - Specifies that this instruction ignores the L-bit in the
VEX
X86MCCodeEmitter.cpp
55
// In the
VEX
prefix, registers are seen sequencially from 0-15 and encoded
59
//
VEX
.VVVV => XMM9 => ~9
384
/// called
VEX
.
418
// VEX_5M (
VEX
m-mmmmm field):
428
// VEX_4V (
VEX
vvvv field): a register specifier
481
case X86II::A6: // Bypass: Not used by
VEX
482
case X86II::A7: // Bypass: Not used by
VEX
483
case X86II::TB: // Bypass: Not used by
VEX
606
//
VEX
opcode prefix can have 2 or 3 bytes
619
if (VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { // 2 byte
VEX
prefi
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