/external/libffi/linux-x86/ |
ffi.h | 6 #define X86 1 9 #include "../src/x86/ffitarget.h"
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/external/llvm/lib/Target/X86/ |
X86RegisterInfo.cpp | 1 //===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===// 10 // This file contains the X86 implementation of the TargetRegisterInfo class. 12 // on X86. 16 #include "X86.h" 56 ? X86::RIP : X86::EIP, 69 StackPtr = X86::RSP; 70 FramePtr = X86::RBP; 73 StackPtr = X86::ESP; 74 FramePtr = X86::EBP [all...] |
X86InstrInfo.cpp | 1 //===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===// 10 // This file contains the X86 implementation of the TargetInstrInfo class. 15 #include "X86.h" 49 " fuse, but the X86 backend currently can't"), 88 ? X86::ADJCALLSTACKDOWN64 89 : X86::ADJCALLSTACKDOWN32), 91 ? X86::ADJCALLSTACKUP64 92 : X86::ADJCALLSTACKUP32)), 96 { X86::ADC32ri, X86::ADC32mi, 0 } [all...] |
X86FloatingPoint.cpp | 26 #define DEBUG_TYPE "x86-codegen" 27 #include "X86.h" 73 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 119 unsigned Reg = *I - X86::FP0; 212 /// getStackEntry - Return the X86::FP<n> register in register ST(i). 219 /// getSTReg - Return the X86::ST(i) register which contains the specified 222 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0; 251 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg); 260 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg); 317 return X86::RFP80RegClass.contains(DstReg) | [all...] |
X86MCInstLower.cpp | 1 //===-- X86MCInstLower.cpp - Convert X86 MachineInstr to an MCInst --------===// 10 // This file contains code to lower X86 MachineInstrs to their corresponding 240 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) 273 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX [all...] |
X86Relocations.h | 1 //===- X86Relocations.h - X86 Code Relocations ------------------*- C++ -*-===// 10 // This file defines the X86 target-specific relocation types. 20 namespace X86 { 21 /// RelocationType - An enum for the x86 relocation codes. Note that 22 /// the terminology here doesn't follow x86 convention - word means 24 /// by JIT or ObjectCode emitters, this is transparent to the x86 code
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X86ELFWriterInfo.cpp | 1 //===-- X86ELFWriterInfo.cpp - ELF Writer Info for the X86 backend --------===// 10 // This file implements ELF writer information for the X86 backend. 38 case X86::reloc_pcrel_word: 40 case X86::reloc_absolute_word: 42 case X86::reloc_absolute_word_sext: 44 case X86::reloc_absolute_dword: 46 case X86::reloc_picrel_word: 52 case X86::reloc_pcrel_word: 54 case X86::reloc_absolute_word: 56 case X86::reloc_absolute_word_sext [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCTargetDesc.cpp | 1 //===-- X86MCTargetDesc.cpp - X86 Target Descriptions -----------*- C++ -*-===// 10 // This file provides X86 specific target descriptions. 195 /// getX86RegNum - This function maps LLVM register identifiers to their X86 199 case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX; 200 case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX [all...] |
X86AsmBackend.cpp | 1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===// 35 MCDisableArithRelaxation("mc-x86-disable-arith-relaxation", 36 cl::desc("Disable relaxation of arithmetic instruction for X86")); 46 case X86::reloc_riprel_4byte: 47 case X86::reloc_riprel_4byte_movq_load: 48 case X86::reloc_signed_4byte: 49 case X86::reloc_global_offset_table: 71 return X86::NumTargetFixupKinds; 75 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = { 121 case X86::JAE_1: return X86::JAE_4 [all...] |
X86BaseInfo.h | 1 //===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===// 11 // the X86 target useful for the compiler back-end and the MC libraries. 26 namespace X86 { 43 } // end namespace X86; 53 // X86 Specific MachineOperand flags. 70 /// See the X86-64 ELF ABI supplement for more details. 77 /// See the X86-64 ELF ABI supplement for more details. 85 /// See the X86-64 ELF ABI supplement for more details. 92 /// See the X86-64 ELF ABI supplement for more details. 172 // Instruction encodings. These are the standard/most common forms for X86 [all...] |
X86FixupKinds.h | 1 //===-- X86/X86FixupKinds.h - X86 Specific Fixup Entries --------*- C++ -*-===// 16 namespace X86 {
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/external/llvm/test/DebugInfo/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/MC/AsmParser/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/MC/Disassembler/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/MC/MachO/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/Other/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/Transforms/LoopStrengthReduce/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/Transforms/TailDup/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/utils/lit/lit/ExampleTests/LLVM.InTree/test/Bar/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/utils/lit/lit/ExampleTests/LLVM.OutOfTree/src/test/Foo/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86InstComments.cpp | 10 // This defines functionality used to emit comments about X86 instructions to 26 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints 36 case X86::INSERTPSrr: 42 case X86::MOVLHPSrr: 48 case X86::MOVHLPSrr: 54 case X86::PSHUFDri: 57 case X86::PSHUFDmi: 63 case X86::PSHUFHWri: 66 case X86::PSHUFHWmi: 71 case X86::PSHUFLWri [all...] |
/external/llvm/host/include/llvm/Config/ |
Targets.def | 27 LLVM_TARGET(X86)
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/external/llvm/test/CodeGen/CBackend/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] && [llvm_supports_target CBackend] } {
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/external/llvm/test/CodeGen/X86/GC/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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/external/llvm/test/CodeGen/X86/ |
dg.exp | 3 if { [llvm_supports_target X86] } {
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