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Searched
refs:getSUnit
(Results
1 - 10
of
10
) sorted by null
/external/llvm/lib/CodeGen/
ScheduleDAGEmit.cpp
40
if (I->
getSUnit
()->CopyDstRC) {
42
DenseMap<SUnit*, unsigned>::iterator VRI = VRBaseMap.find(I->
getSUnit
());
ScheduleDAG.cpp
97
SUnit *N = D.
getSUnit
();
134
SUnit *N = D.
getSUnit
();
177
SUnit *SuccSU = I->
getSUnit
();
193
SUnit *PredSU = I->
getSUnit
();
234
SUnit *PredSU = I->
getSUnit
();
267
SUnit *SuccSU = I->
getSUnit
();
317
dbgs() << I->
getSUnit
() << " - SU(" << I->
getSUnit
()->NodeNum << ")";
338
dbgs() << I->
getSUnit
() << " - SU(" << I->
getSUnit
()->NodeNum << ")"
[
all
...]
LatencyPriorityQueue.cpp
59
SUnit &Pred = *I->
getSUnit
();
78
if (getSingleUnscheduledPred(I->
getSUnit
()) == SU)
94
AdjustPriorityOfUnscheduledPreds(I->
getSUnit
());
AggressiveAntiDepBreaker.cpp
301
const SUnit *PredSU = P->
getSUnit
();
314
return (Next) ? Next->
getSUnit
() : 0;
814
SUnit *NextSU = Edge->
getSUnit
();
859
if (P->
getSUnit
() == NextSU ?
868
if ((P->
getSUnit
() == NextSU) && (P->getKind() != SDep::Anti) &&
873
} else if ((P->
getSUnit
() != NextSU) &&
[
all
...]
CriticalAntiDepBreaker.cpp
165
const SUnit *PredSU = P->
getSUnit
();
529
const SUnit *NextSU = Edge->
getSUnit
();
553
if (P->
getSUnit
() == NextSU ?
PostRASchedulerList.cpp
537
SUnit *SuccSU = SuccEdge->
getSUnit
();
/external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGFast.cpp
135
SUnit *PredSU = PredEdge->
getSUnit
();
167
LiveRegDefs[I->getReg()] = I->
getSUnit
();
191
if (LiveRegCycles[I->getReg()] == I->
getSUnit
()->getHeight()) {
284
else if (I->
getSUnit
()->getNode() &&
285
I->
getSUnit
()->getNode()->isOperandOf(LoadNode))
298
if (ChainPred.
getSUnit
()) {
317
SUnit *SuccDep = D.
getSUnit
();
325
SUnit *SuccDep = D.
getSUnit
();
362
SUnit *SuccSU = I->
getSUnit
();
399
SUnit *SuccSU = I->
getSUnit
();
[
all
...]
ScheduleDAGRRList.cpp
204
Topo.AddPred(SU, D.
getSUnit
());
212
Topo.RemovePred(SU, D.
getSUnit
());
367
SUnit *PredSU = PredEdge->
getSUnit
();
434
assert((!RegDef || RegDef == SU || RegDef == I->
getSUnit
()) &&
436
LiveRegDefs[I->getReg()] = I->
getSUnit
();
659
SUnit *PredSU = PredEdge->
getSUnit
();
681
assert(LiveRegDefs[I->getReg()] == I->
getSUnit
() &&
699
I->
getSUnit
()->getHeight() < LiveRegGens[I->getReg()]->getHeight())
700
LiveRegGens[I->getReg()] = I->
getSUnit
();
863
else if (isOperandOf(I->
getSUnit
(), LoadNode)
[
all
...]
ScheduleDAGList.cpp
109
SUnit *SuccSU = D.
getSUnit
();
/external/llvm/include/llvm/CodeGen/
ScheduleDAG.h
153
////
getSUnit
- Return the SUnit to which this edge points.
154
SUnit *
getSUnit
() const {
399
if (Preds[i].
getSUnit
() == N)
407
if (Succs[i].
getSUnit
() == N)
605
return Node->Preds[Operand].
getSUnit
();
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