| /system/core/libpixelflinger/ |
| col32cb16blend.S | 42 mov r5, r1, lsr #24 // shift down alpha
44 add r5, r5, r5, lsr #7 // add in top bit
47 and r12, r9, r1, lsr #8 // extract green
48 and r4, r9, r1, lsr #16 // extract blue
52 mov r9, r9, lsr #2 // create dest green mask
57 mov r6, r8, lsr #11 // extract dest red
58 and r7, r9, r8, lsr #5 // extract dest green
65 mov r6, r6, lsr #8 // shift down red
66 mov r7, r7, lsr #8 // shift down green
69 orr r6, r8, lsr #8 // shift blue into 56
[all...] |
| t32cb16blend.S | 47 mov r7, \SRC, lsr #24 // sA
48 add r7, r7, r7, lsr #7 // sA + (sA >> 7)
56 mov lr, \DREG, lsr #(16 + 11)
58 mov r6, \SRC, lsr #3
60 add lr, r6, lr, lsr #8
68 mov lr, \SRC, lsr #(8+2)
70 add r6, lr, r6, lsr #(5+8)
78 mov r6, \SRC, lsr #(8+8+3)
80 add lr, r6, lr, lsr #8
88 mov lr, \DREG, lsr #1
[all...] |
| /external/skia/src/core/asm/ |
| s32a_d565_opaque.S | 36 mov lr, r1, lsr #24
42 moveq r2, r1, lsr #5
46 orreq r3, r3, r6, lsr #27
52 mov r5, r3, lsr #24
54 mov lr, r6, lsr #24
57 mov r1, r3, lsr #5
61 mov r1, r3, lsr #11
62 add r2, r2, r2, lsr #6
65 add r2, r5, r2, lsr #6
68 add r1, r1, r1, lsr #
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_IGET_QUICK.S | 5 mov r2, rINST, lsr #12 @ r2<- B
9 mov r2, rINST, lsr #8 @ r2<- A(+)
|
| OP_IGET_WIDE_QUICK.S | 4 mov r2, rINST, lsr #12 @ r2<- B
8 mov r2, rINST, lsr #8 @ r2<- A(+)
|
| ALT_OP_DISPATCH_FF.S | 7 mov ip, rINST, lsr #8 @ ip<- extended opcode
|
| OP_DISPATCH_FF.S | 2 mov ip, rINST, lsr #8 @ ip<- extended opcode
|
| OP_RETURN.S | 9 mov r2, rINST, lsr #8 @ r2<- AA
|
| OP_ARRAY_LENGTH.S | 5 mov r1, rINST, lsr #12 @ r1<- B
6 mov r2, rINST, lsr #8 @ r2<- A+
|
| OP_MOVE.S | 4 mov r1, rINST, lsr #12 @ r1<- B from 15:12
5 mov r0, rINST, lsr #8 @ r0<- A from 11:8
|
| binopLit16.S | 16 mov r2, rINST, lsr #12 @ r2<- B
17 mov r9, rINST, lsr #8 @ r9<- A+
|
| unop.S | 11 mov r3, rINST, lsr #12 @ r3<- B
12 mov r9, rINST, lsr #8 @ r9<- A+
|
| OP_USHR_LONG.S | 10 mov r9, rINST, lsr #8 @ r9<- AA
12 mov r0, r0, lsr #8 @ r0<- CC
19 mov r0, r0, lsr r2 @ r0<- r2 >> r2
23 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
29 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
|
| OP_USHR_LONG_2ADDR.S | 7 mov r9, rINST, lsr #8 @ r9<- A+
8 mov r3, rINST, lsr #12 @ r3<- B
15 mov r0, r0, lsr r2 @ r0<- r2 >> r2
20 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
21 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_IGET_QUICK.S | 5 mov r2, rINST, lsr #12 @ r2<- B
|
| OP_IGET_WIDE_QUICK.S | 4 mov r2, rINST, lsr #12 @ r2<- B
|
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_USHR_LONG.S | 9 mov r0, r0, lsr r2 @ r0<- r2 >> r2
13 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
14 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
|
| /external/llvm/test/MC/ARM/ |
| arm_addrmode2.s | 5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
8 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
11 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
14 @ CHECK: strbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xe0,0xe6]
17 ldrt r1, [r0], r2, lsr #3
20 ldrbt r1, [r0], r2, lsr #3
23 strt r1, [r0], r2, lsr #3
26 strbt r1, [r0], r2, lsr #3
30 @ CHECK: ldr r1, [r0, r2, lsr #3]! @ encoding: [0xa2,0x11,0xb0,0xe7]
31 @ CHECK: ldrb r1, [r0, r2, lsr #3]! @ encoding: [0xa2,0x11,0xf0,0xe7
[all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.stdout.exp | [all...] |
| /dalvik/vm/mterp/arm-vfp/ |
| fbinop2addr.S | 9 mov r3, rINST, lsr #12 @ r3<- B
10 mov r9, rINST, lsr #8 @ r9<- A+
|
| fbinopWide2addr.S | 10 mov r3, rINST, lsr #12 @ r3<- B
11 mov r9, rINST, lsr #8 @ r9<- A+
|
| funop.S | 8 mov r3, rINST, lsr #12 @ r3<- B
9 mov r9, rINST, lsr #8 @ r9<- A+
|
| funopNarrower.S | 8 mov r3, rINST, lsr #12 @ r3<- B
9 mov r9, rINST, lsr #8 @ r9<- A+
|
| funopWider.S | 8 mov r3, rINST, lsr #12 @ r3<- B
9 mov r9, rINST, lsr #8 @ r9<- A+
|
| /frameworks/base/opengl/libagl/ |
| fixed_asm.S | 38 sub r1, r2, r1, lsr #24 /* compute shift */
41 mov r0, r2, lsr r1 /* scale to 16.16 */
53 subs r1, r2, r1, lsr #24 /* compute shift */
58 movs r0, r2, lsr r1 /* scale to 16.16 */
|
