/external/openssl/crypto/sha/asm/ |
sha1-armv4-large.s | 15 mov r5,r5,ror#30 16 mov r6,r6,ror#30 17 mov r7,r7,ror#30 @ [6] 22 add r7,r8,r7,ror#2 @ E+=K_00_19 24 add r7,r7,r3,ror#27 @ E+=ROR(A,27) 29 and r10,r4,r10,ror#2 31 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D) 37 add r6,r8,r6,ror#2 @ E+=K_00_19 39 add r6,r6,r7,ror#27 @ E+=ROR(A,27 [all...] |
sha256-armv4.s | 44 mov r0,r8,ror#6 46 eor r0,r0,r8,ror#11 48 eor r0,r0,r8,ror#25 @ Sigma1(e) 53 mov r11,r4,ror#2 55 eor r11,r11,r4,ror#13 57 eor r11,r11,r4,ror#22 @ Sigma0(a) 74 mov r0,r7,ror#6 76 eor r0,r0,r7,ror#11 78 eor r0,r0,r7,ror#25 @ Sigma1(e) 83 mov r10,r11,ror# [all...] |
sha1-armv4-large.pl | 76 add $e,$K,$e,ror#2 @ E+=K_xx_xx 81 mov $t0,$t0,ror#31 82 add $e,$e,$a,ror#27 @ E+=ROR(A,27) 83 eor $t0,$t0,$t2,ror#31 97 add $e,$K,$e,ror#2 @ E+=K_00_19 99 add $e,$e,$a,ror#27 @ E+=ROR(A,27) 104 and $t1,$b,$t1,ror#2 106 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D [all...] |
sha256-586.pl | 52 &ror ("ecx",6); 54 &ror ("edi",11); 57 &ror ("edi",25-11); 72 &ror ("ecx",2); 74 &ror ("edi",13); 77 &ror ("edi",22-13); 172 &ror ("esi",7); 174 &ror ("esi",18-7); 180 &ror ("edi",17); 182 &ror ("edi",19-17) [all...] |
sha256-armv4.pl | 60 mov $t0,$e,ror#$Sigma1[0] 62 eor $t0,$t0,$e,ror#$Sigma1[1] 64 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e) 69 mov $h,$a,ror#$Sigma0[0] 71 eor $h,$h,$a,ror#$Sigma0[1] 73 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a) 91 mov $t0,$t1,ror#$sigma0[0] 93 eor $t0,$t0,$t1,ror#$sigma0[1] 95 mov $t1,$t2,ror#$sigma1[0] 97 eor $t1,$t1,$t2,ror#$sigma1[1 [all...] |
sha512-x86_64.pl | 102 ror \$$Sigma1[0],$a0 103 ror \$$Sigma1[1],$a1 107 ror \$`$Sigma1[2]-$Sigma1[1]`,$a1 122 ror \$$Sigma0[0],$h 123 ror \$$Sigma0[1],$a0 128 ror \$`$Sigma0[2]-$Sigma0[1]`,$a0 155 ror \$$sigma0[0],$a2 158 ror \$`$sigma0[1]-$sigma0[0]`,$a2 164 ror \$$sigma1[0],$a1 167 ror \$`$sigma1[1]-$sigma1[0]`,$a [all...] |
/external/libvpx/vp8/encoder/arm/armv6/ |
vp8_subtract_armv6.asm | 49 uxtb16 r0, r0, ror #8 ; [s3 | s1] 50 uxtb16 r1, r1, ror #8 ; [p3 | p1] 94 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A) 95 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A) 111 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B) 112 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B) 137 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A) 138 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A) 154 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B) 155 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B [all...] |
vp8_mse16x16_armv6.asm | 55 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords 74 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords 95 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords 118 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
|
vp8_variance16x16_armv6.asm | 54 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords 78 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords 102 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords 128 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords
|
vp8_variance_halfpixvar16x16_h_armv6.asm | 59 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 90 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 121 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 154 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords
|
vp8_variance_halfpixvar16x16_v_armv6.asm | 60 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 91 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 122 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords 155 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords
|
/external/libvpx/vp8/common/arm/armv6/ |
dc_only_idct_add_v6.asm | 34 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1 36 uxtab16 r6, r0, r6, ror #8 49 uxtab16 r4, r0, r4, ror #8 51 uxtab16 r6, r0, r6, ror #8
|
recon_v6.asm | 52 uxtab16 r9, r9, r4, ror #8 ; 3 | 1 + 0 | 3 | 2 | 1 72 uxtab16 r9, r9, r4, ror #8 ; 3 | 1 + 0 | 3 | 2 | 1 92 uxtab16 r9, r9, r4, ror #8 ; 3 | 1 + 0 | 3 | 2 | 1 112 uxtab16 r9, r9, r4, ror #8 ; 3 | 1 + 0 | 3 | 2 | 1 148 uxtab16 r9, r9, r4, ror #8 ; 3 | 1 + 0 | 3 | 2 | 1 167 uxtab16 r9, r9, r4, ror #8 185 uxtab16 r9, r9, r4, ror #8 203 uxtab16 r9, r9, r4, ror #8 245 uxtab16 r9, r9, r4, ror #8 263 uxtab16 r9, r9, r4, ror # [all...] |
/external/llvm/test/MC/ARM/ |
basic-arm-instructions.s | 58 adc r4, r5, r6, ror #1 59 adc r4, r5, r6, ror #31 65 adc r6, r7, r8, ror r9 78 adc r4, r5, ror #1 79 adc r4, r5, ror #31 84 adc r6, r7, ror r9 97 @ CHECK: adc r4, r5, r6, ror #1 @ encoding: [0xe6,0x40,0xa5,0xe0] 98 @ CHECK: adc r4, r5, r6, ror #31 @ encoding: [0xe6,0x4f,0xa5,0xe0] 103 @ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0] 115 @ CHECK: adc r4, r4, r5, ror #1 @ encoding: [0xe5,0x40,0xa4,0xe0 [all...] |
basic-thumb2-instructions.s | 47 adc r0, r1, r3, ror #4 56 @ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10] 97 add.w r4, r8, r1, ror #12 103 @ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34] 137 and.w r9, r12, r1, ror #17 143 @ CHECK: and.w r9, r12, r1, ror #17 @ encoding: [0x0c,0xea,0x71,0x49] 235 bic r5, r6, r8, ror #1 244 bic r12, r6, ror #29 252 @ CHECK: bic.w r5, r6, r8, ror #1 @ encoding: [0x26,0xea,0x78,0x05] 260 @ CHECK: bic.w r12, r12, r6, ror #29 @ encoding: [0x2c,0xea,0x76,0x7c [all...] |
diagnostics.s | 20 adc r4, r5, r6, ror #-1 21 adc r4, r5, r6, ror #32 45 @ CHECK-ERRORS: adc r4, r5, r6, ror #-1 48 @ CHECK-ERRORS: adc r4, r5, r6, ror #32 244 sxtb r8, r3, ror 24 245 sxtb r8, r3, ror #8 - 246 sxtab r3, r8, r3, ror #(fred - wilma) 247 sxtab r7, r8, r3, ror #25 248 sxtah r9, r3, r3, ror #-8 255 @ CHECK-ERRORS: sxtb r8, r3, ror 2 [all...] |
/external/llvm/lib/Target/ARM/ |
ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror;
|
/external/valgrind/main/none/tests/arm/ |
v6intARM.stdout.exp | 295 ROR 296 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000000, carryin 0, cpsr 0x00000000 297 ror r0, r1, r2 :: rd 0x40044000 rm 0x80088000, rn 0x00000001, carryin 0, cpsr 0x00000000 298 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000001, carryin 0, cpsr 0x00000000 299 ror r0, r1, r2 :: rd 0x00022000 rm 0x00088000, rn 0x00000002, carryin 0, cpsr 0x00000000 300 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000001f, carryin 0, cpsr 0x00000000 301 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000020, carryin 0, cpsr 0x00000000 302 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000021, carryin 0, cpsr 0x00000000 303 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000003f, carryin 0, cpsr 0x00000000 304 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000040, carryin 0, cpsr 0x00000000 [all...] |
/external/skia/gpu/include/ |
GrTextureCache.h | 100 static uint32_t ror(uint32_t x) { function in class:GrTextureKey 108 uint32_t hash = fP0 ^ rol(fP1) ^ ror(fP2) ^ rohalf(fPrivateBits);
|
/external/openssl/crypto/perlasm/ |
x86asm.pl | 54 &ror (@_,16); 65 sub ::rotr { &ror(@_); }
|
/external/openssl/crypto/aes/asm/ |
aes-armv4.pl | 267 eor $s0,$s0,$i1,ror#8 270 eor $t2,$t2,$i2,ror#8 272 eor $t3,$t3,$i3,ror#8 274 eor $s1,$s1,$t1,ror#24 280 eor $s0,$s0,$i1,ror#16 283 eor $s1,$s1,$i2,ror#8 285 eor $t3,$t3,$i3,ror#16 287 eor $s2,$s2,$t2,ror#16 293 eor $s0,$s0,$i1,ror#24 295 eor $s1,$s1,$i2,ror#1 [all...] |
aes-armv4.s | 219 eor r0,r0,r7,ror#8 222 eor r5,r5,r8,ror#8 224 eor r6,r6,r9,ror#8 226 eor r1,r1,r4,ror#24 232 eor r0,r0,r7,ror#16 235 eor r1,r1,r8,ror#8 237 eor r6,r6,r9,ror#16 239 eor r2,r2,r5,ror#16 245 eor r0,r0,r7,ror#24 247 eor r1,r1,r8,ror#1 [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAddressingModes.h | 31 ror, enumerator in enum:llvm::ARM_AM::ShiftOpc 50 case ARM_AM::ror: return "ror"; 61 case ARM_AM::ror: return 3; 104 // reg [asr|lsl|lsr|ror|rrx] reg 105 // reg [asr|lsl|lsr|ror|rrx] imm
|
/bionic/libc/arch-arm/bionic/ |
strcpy.S | 87 ror r3, r3, #8
|
/external/openssl/crypto/rc4/asm/ |
rc4-x86_64.pl | 117 ror \$8,%rax # ror is redundant when $i=0 130 ror \$8,%rax 192 ror \$8,%eax 211 ror \$8,%ebx
|