| /external/llvm/test/CodeGen/X86/ |
| extmul64.ll | 3 define i64 @i32_sext_i64(i32 %a, i32 %b) {
4 %aa = sext i32 %a to i64
5 %bb = sext i32 %b to i64
6 %cc = mul i64 %aa, %bb
7 ret i64 %cc
9 define i64 @i32_zext_i64(i32 %a, i32 %b) {
10 %aa = zext i32 %a to i64
11 %bb = zext i32 %b to i64
12 %cc = mul i64 %aa, %bb
13 ret i64 %c
[all...] |
| imul-lea-2.ll | 5 define i64 @t1(i64 %a) nounwind readnone {
7 %0 = mul i64 %a, 81 ; <i64> [#uses=1]
8 ret i64 %0
11 define i64 @t2(i64 %a) nounwind readnone {
13 %0 = mul i64 %a, 40 ; <i64> [#uses=1]
14 ret i64 %
[all...] |
| insertelement-legalize.ll | 4 define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind {
6 %tmp4 = insertelement <2 x i64> %val, i64 %x, i32 0 ; <<2 x i64>> [#uses=1]
7 %add = add <2 x i64> %tmp4, %val ; <<2 x i64>> [#uses=1]
8 store <2 x i64> %add, <2 x i64>* %ds
[all...] |
| zext-inreg-1.ll | 9 define i64 @l(i64 %d) nounwind {
10 %e = add i64 %d, 1
11 %retval = and i64 %e, 1099511627775
12 ret i64 %retval
14 define i64 @m(i64 %d) nounwind {
15 %e = add i64 %d, 1
16 %retval = and i64 %e, 281474976710655
17 ret i64 %retva
[all...] |
| 2010-02-04-SchedulerBug.ll | 4 %struct.a_t = type { i8*, i64*, i8*, i32, i32, i64*, i64*, i64* }
5 %struct.b_t = type { i32, i32, i32, i32, i64, i64, i64, i64 }
7 define void @t(i32 %cNum, i64 %max) nounwind optsize ssp noimplicitfloat {
10 %1 = getelementptr inbounds %struct.b_t* %0, i32 %cNum, i32 5 ; <i64*> [#uses=1
[all...] |
| 2007-07-18-Vector-Extract.ll | 5 define i64 @foo_0(<2 x i64>* %val) {
7 %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; <i64*> [#uses=1]
8 %tmp7 = load i64* %val12 ; <i64> [#uses=1]
9 ret i64 %tmp7
12 define i64 @foo_1(<2 x i64>* %val) {
14 %tmp2.gep = getelementptr <2 x i64>* %val, i32 0, i32 1 ; <i64*> [#uses=1
[all...] |
| 2009-01-26-WrongCheck.ll | 8 %t712 = zext i32 %t711 to i64 ; <i64> [#uses=1]
9 %t804 = select i1 %t801, i64 0, i64 %t712 ; <i64> [#uses=1]
10 store i64 %t804, i64* null
12 %t814 = sext i32 %t711 to i64 ; <i64> [#uses=1]
13 %t816 = select i1 %t815, i64 0, i64 %t814 ; <i64> [#uses=1
[all...] |
| adde-carry.ll | 3 define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b, i64 %c) nounwind {
5 %0 = zext i64 %a to i128
6 %1 = zext i64 %b to i128
8 %3 = zext i64 %c to i128
12 %7 = trunc i128 %6 to i64
13 store i64 %7, i64* %s, align
[all...] |
| fast-cc-pass-in-regs.ll | 4 declare x86_fastcallcc i64 @callee(i64)
6 define i64 @caller() {
7 %X = call x86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1]
9 ret i64 %X
12 define x86_fastcallcc i64 @caller2(i64 %X) {
13 ret i64 %
[all...] |
| i128-mul.ll | 4 define i64 @foo(i64 %x, i64 %y) {
5 %tmp0 = zext i64 %x to i128
6 %tmp1 = zext i64 %y to i128
10 %tmp4 = trunc i128 %tmp3 to i64
11 ret i64 %tmp4
|
| zext-trunc.ll | 4 define i64 @foo(i64 %a, i64 %b) nounwind {
9 %c = add i64 %a, %b
10 %d = trunc i64 %c to i32
11 %e = zext i32 %d to i64
12 ret i64 %e
|
| 2007-10-16-CoalescerCrash.ll | 3 define i64 @__ashldi3(i64 %u, i64 %b) {
8 %tmp9 = sub i64 32, %b ; <i64> [#uses=2]
9 %tmp11 = icmp slt i64 %tmp9, 1 ; <i1> [#uses=1]
10 %tmp2180 = trunc i64 %u to i32 ; <i32> [#uses=2]
11 %tmp2223 = trunc i64 %tmp9 to i32 ; <i32> [#uses=2]
17 %tmp2569 = zext i32 %tmp25 to i64 ; <i64> [#uses=1
[all...] |
| rotate2.ll | 3 define i64 @test1(i64 %x) nounwind {
5 %tmp2 = lshr i64 %x, 55 ; <i64> [#uses=1]
6 %tmp4 = shl i64 %x, 9 ; <i64> [#uses=1]
7 %tmp5 = or i64 %tmp2, %tmp4 ; <i64> [#uses=1]
8 ret i64 %tmp5
11 define i64 @test2(i32 %x) nounwind
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| x86-crc32-demanded.ll | 6 define i64 @test() nounwind {
9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64
12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind
13 %1 = and i64 %0, 4294967295
14 ret i64 %1
17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnon
[all...] |
| fold-vector-zero.ll | 3 define void @foo(i64 %A, i64 %B) {
8 %s0 = phi i64 [ 0, %bb8 ], [ %r21, %bb30 ]
9 %l0 = phi i64 [ -2222, %bb8 ], [ %r23, %bb30 ]
10 %r2 = add i64 %s0, %B
11 %r3 = inttoptr i64 %r2 to <2 x double>*
13 %r6 = bitcast <2 x double> %r4 to <2 x i64>
14 %r7 = bitcast <2 x double> zeroinitializer to <2 x i64>
15 %r8 = insertelement <2 x i64> undef, i64 9223372036854775807, i32
[all...] |
| /external/llvm/test/Transforms/ScalarRepl/ |
| sroa-fca.ll | 4 define i64 @test({i32, i32} %A) {
5 %X = alloca i64
6 %Y = bitcast i64* %X to {i32,i32}*
9 %Q = load i64* %X
10 ret i64 %Q
13 define {i32,i32} @test2(i64 %A) {
14 %X = alloca i64
15 %Y = bitcast i64* %X to {i32,i32}*
16 store i64 %A, i64* %
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| carry.ll | 3 define i64 @f1(i64 %a, i64 %b) {
8 %tmp = sub i64 %a, %b
9 ret i64 %tmp
12 define i64 @f2(i64 %a, i64 %b) {
18 %tmp1 = shl i64 %a, 1
19 %tmp2 = sub i64 %tmp1, %
[all...] |
| arguments8.ll | 4 define i64 @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b) {
5 %tmp = call i64 @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b)
6 ret i64 %tmp
9 declare i64 @g(i32, i32, i32, i32, i64)
|
| atomic-64bit.ll | 3 define i64 @test1(i64* %ptr, i64 %val) {
13 %r = atomicrmw add i64* %ptr, i64 %val seq_cst
14 ret i64 %r
17 define i64 @test2(i64* %ptr, i64 %val) {
27 %r = atomicrmw sub i64* %ptr, i64 %val seq_cs
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| rotl-64.ll | 5 define i64 @t1(i64 %A) {
6 %tmp1 = lshr i64 %A, 57
7 %tmp2 = shl i64 %A, 7
8 %tmp3 = or i64 %tmp1, %tmp2
9 ret i64 %tmp3
12 define i64 @t2(i64 %A, i8 zeroext %Amt) {
13 %Amt1 = zext i8 %Amt to i64
14 %tmp1 = lshr i64 %A, %Amt
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 06-LocalFrame.ll | 5 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
8 define noalias i64* @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f) nounwind readnone {
10 %g = alloca i64, align 8 ; <i64*> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| i128-arith.ll | 3 define i64 @foo(i64 %x, i64 %y, i32 %amt) {
4 %tmp0 = zext i64 %x to i128
5 %tmp1 = sext i64 %y to i128
9 %tmp4 = trunc i128 %tmp3 to i64
10 ret i64 %tmp4
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldrd.ll | 3 @b = external global i64*
5 define i64 @t(i64 %a) nounwind readonly {
8 %0 = load i64** @b, align 4
9 %1 = load i64* %0, align 4
10 %2 = mul i64 %1, %a
11 ret i64 %2
|
| /external/llvm/test/Feature/ |
| indirectcall.ll | 7 define i64 @fib(i64 %n) {
8 icmp ult i64 %n, 2 ; <i1>:1 [#uses=1]
12 ret i64 1
15 %n2 = sub i64 %n, 2 ; <i64> [#uses=1]
16 %n1 = sub i64 %n, 1 ; <i64> [#uses=1]
17 %f2 = call i64 @fib( i64 %n2 ) ; <i64> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/XCore/ |
| ladd_lsub_combine.ll | 4 define i64 @f1(i32 %x, i32 %y) nounwind {
6 %0 = zext i32 %x to i64 ; <i64> [#uses=1]
7 %1 = zext i32 %y to i64 ; <i64> [#uses=1]
8 %2 = add i64 %1, %0 ; <i64> [#uses=1]
9 ret i64 %2
17 define i64 @f2(i32 %x, i32 %y) nounwind {
19 %0 = zext i32 %x to i64 ; <i64> [#uses=1
[all...] |
