| /external/llvm/test/CodeGen/X86/ |
| 2007-07-03-GR64ToVR64.ll | 9 define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind {
11 %tmp4 = bitcast <1 x i64> %B to x86_mmx ; <<4 x i16>> [#uses=1]
12 %tmp6 = bitcast <1 x i64> %A to x86_mmx ; <<4 x i16>> [#uses=1]
|
| 2008-04-24-pblendw-fold-crash.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
9 %tmp122 = load <2 x i64>* null, align 16 ; <<2 x i64>> [#uses=1]
10 %tmp126 = bitcast <2 x i64> %tmp122 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
| 2008-10-11-CallCrash.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
7 define i32 @func_45(i64 %p_46, i32 %p_48) nounwind {
9 %0 = tail call i32 (...)* @lshift_s_u(i64 %p_46, i64 0) nounwind ; <i32> [#uses=0]
|
| 2009-04-25-CoalescerBug.ll | 4 define i64 @test(i32* %tmp13) nounwind {
12 %conv = zext i32 %bf.lo.cleared to i64 ; <i64> [#uses=1]
18 ret i64 %conv
|
| 2010-02-11-NonTemporal.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
12 %"$LCS_0" = alloca i64, align 8
15 %r10 = load i64* %"$LCS_0", align 8
16 %r11 = inttoptr i64 %r10 to <2 x double>*
|
| 2010-05-06-LocalInlineAsmClobber.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
8 call i64 asm sideeffect "", "={ax},0,i,i,r,{si},{di},r,{dx},imr,imr,~{sp},~{memory},~{r8},~{r10},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i64 4294967274, i32 56, i32 60, i32 (i8*)* undef, i8* undef, i32 undef, i8* undef, i32* undef, i8* undef, i32* undef) nounwind ; <i64> [#uses=0]
|
| 2011-06-01-fildll.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
6 define float @f(i64* nocapture %x) nounwind readonly ssp {
10 %tmp1 = load i64* %x, align 4
12 %conv = sitofp i64 %tmp1 to float
|
| 2011-08-23-PerformSubCombine128.ll | 3 define void @test(i64 %add127.tr.i2686) {
5 %conv143.i2687 = and i64 %add127.tr.i2686, 72057594037927935
6 %conv76.i2623 = zext i64 %conv143.i2687 to i128
16 %add116.tr.i2280 = trunc i128 %add116.i2274 to i64
|
| change-compare-stride-trickiness-1.ll | 22 %tmp645646647.us1547 = sext i32 %tmp628.us1540 to i64 ; <i64> [#uses=1]
23 store i64 %tmp645646647.us1547, i64* null
|
| extractelement-load.ll | 4 define i32 @t(<2 x i64>* %val) nounwind {
9 %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1]
10 %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
| fast-isel-bail.ll | 6 %0 = type { i64, i8* } ; type %0
|
| fastcall-correct-mangling.ll | 5 define x86_fastcallcc void @func(i64 %X, i8 %Y, i8 %G, i16 %Z) {
|
| memset.ll | 11 call void @llvm.memset.p0i8.i64(i8* %tmp110117, i8 0, i64 32, i32 8, i1 false)
18 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
|
| promote-assert-zext.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
12 define i64 @_ZL5matchPKtPKhiR9MatchData(i8* %tmp13) nounwind {
20 %tmp23 = sext i16 %tmp18 to i64
21 ret i64 %tmp23
|
| tlv-1.ll | 9 call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false)
17 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
|
| vec_set-2.ll | 12 define <2 x i64> @test(i32 %a) nounwind {
17 %tmp19 = bitcast <4 x i32> %tmp10 to <2 x i64> ; <<2 x i64>> [#uses=1]
18 ret <2 x i64> %tmp19
|
| vec_set-3.ll | 11 define <2 x i64> @test2(i32 %a) nounwind {
14 %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
15 ret <2 x i64> %tmp10
|
| vec_set-H.ll | 3 define <2 x i64> @doload64(i16 signext %x) nounwind {
13 %tmp46 = bitcast <8 x i16> %tmp43 to <2 x i64> ; <<2 x i64>> [#uses=1]
14 ret <2 x i64> %tmp46
|
| vshift-4.ll | 6 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
10 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
11 %shl = shl <2 x i64> %val, %shamt
12 store <2 x i64> %shl, <2 x i64>* %dst
17 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind
[all...] |
| /external/llvm/test/Linker/ |
| 2008-07-06-AliasWeakDest.ll | 7 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
10 @sched_clock = alias i64 ()* @native_sched_clock
15 define i64 @native_sched_clock() nounwind {
17 ret i64 0
|
| /external/llvm/test/Transforms/ArgumentPromotion/ |
| attrs.ll | 3 %struct.ss = type { i32, i64 }
21 %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
22 store i64 2, i64* %tmp4, align 4
|
| byval-2.ll | 4 %struct.ss = type { i32, i64 }
22 %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
23 store i64 2, i64* %tmp4, align 4
|
| /external/llvm/test/Transforms/ConstProp/ |
| float-to-ptr-cast.ll | 4 %X = inttoptr i64 0 to i32* ; <i32*> [#uses=1]
|
| /external/llvm/test/Transforms/Inline/ |
| gvn-inline-iteration.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
7 define i32 @foo(i32 ()** noalias nocapture %p, i64* noalias nocapture %q) nounwind ssp {
10 store i64 0, i64* %q
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2007-02-07-PointerCast.ll | 15 %tmp = getelementptr [6 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1]
18 %tmp3 = zext i32 %tmp2 to i64 ; <i64> [#uses=1]
19 %tmp.upgrd.1 = call i32 (i8*, ...)* @printf( i8* %tmp, i64 %tmp3 ) ; <i32> [#uses=0]
|
