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  /external/clang/test/CodeGenCXX/
x86_64-arguments.cpp 12 // CHECK: define void @_Z2f15f1_s1(i64 %a0.coerce0, <2 x float> %a0.coerce1)
18 // CHECK: define void @_Z2f25f2_s1(i64 %a0.coerce0, i64 %a0.coerce1)
22 // CHECK: define void @_Z2f34s3_1(i64 %x.coerce)
27 // CHECK: define i64 @_Z4f4_0M2s4i(i64 %a)
28 // CHECK: define {{.*}} @_Z4f4_1M2s4FivE(i64 %a.coerce0, i64 %a.coerce1)
116 // CHECK: define i32 @_ZN5test64testENS_5outerE(i64 %x.coerce0, i32 %x.coerce1)
  /external/llvm/test/CodeGen/PTX/
add.ll 17 define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
20 %z = add i64 %x, %y
21 ret i64 %z
52 define ptx_device i64 @t2_u64(i64 %x) {
55 %z = add i64 %x, 1
56 ret i64 %z
sub.ll 17 define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
20 %z = sub i64 %x, %y
21 ret i64 %z
52 define ptx_device i64 @t2_u64(i64 %x) {
55 %z = sub i64 %x, 1
56 ret i64 %z
  /external/llvm/test/CodeGen/SystemZ/
2010-01-04-DivMem.ll 2 target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"
13 %idxprom = sext i32 %tmp to i64 ; <i64> [#uses=1]
14 %arrayidx = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom ; <i32*> [#uses=2]
17 %idxprom3 = sext i32 %tmp2 to i64 ; <i64> [#uses=1]
18 %arrayidx4 = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom3 ; <i32*> [#uses=3]
  /external/llvm/test/CodeGen/X86/
2009-04-29-RegAllocAssert.ll 13 %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
19 %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
22 %struct.Context = type { i64, i32, %struct.Fifo }
23 %struct.CountCtx = type { i64 }
24 %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
32 %struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
    [all...]
machine-cse.ll 6 %struct.s2 = type { i32, i8*, i8*, [256 x %struct.s1*], [8 x i32], i64, i8*, i32, i64, i64, i32, %struct.s3*, %struct.s3*, [49 x i64] }
13 %0 = zext i32 %base to i64
14 %1 = getelementptr inbounds %struct.s2* null, i64 %0
22 %2 = getelementptr inbounds %struct.s2* null, i64 %0, i32 0
67 %tmp753 = zext i32 %tmp752 to i64
71 %exitcond = icmp eq i64 undef, %tmp753
vec_shuffle.ll 23 define void @test_v8i16(<2 x i64>* %res, <2 x i64>* %A) nounwind {
24 %tmp = load <2 x i64>* %A ; <<2 x i64>> [#uses=1]
25 %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> ; <<8 x i16>> [#uses=8]
42 %tmp15.upgrd.3 = bitcast <8 x i16> %tmp15 to <2 x i64> ; <<2 x i64>> [#uses=1]
43 store <2 x i64> %tmp15.upgrd.3, <2 x i64>* %res
2011-10-12-MachineCSE.ll 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
9 %union.rtunion_def = type { i64 }
22 %idxprom = sext i32 %bf.clear to i64
23 %3 = load %struct.optab** getelementptr inbounds ([49 x %struct.optab*]* @optab_table, i32 0, i64 0), align 8, !tbaa !0
25 %arrayidx = getelementptr inbounds [59 x %struct.anon.3]* %handlers, i32 0, i64 %idxprom
32 %idxprom1 = sext i32 %4 to i64
33 %arrayidx2 = getelementptr inbounds [0 x %struct.insn_data]* @insn_data, i32 0, i64 %idxprom1
36 %arrayidx3 = getelementptr inbounds %struct.insn_operand_data* %5, i64 0
39 %idxprom4 = sext i32 %4 to i64
40 %arrayidx5 = getelementptr inbounds [0 x %struct.insn_data]* @insn_data, i32 0, i64 %idxprom
    [all...]
avx-splat.ll 26 define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp {
28 %vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
29 %vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
30 %vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
31 %vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32
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optimize-max-3.ll 10 define void @foo(i64 %n, double* nocapture %p) nounwind {
12 %cmp6 = icmp slt i64 %n, 0 ; <i1> [#uses=1]
16 %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
17 %n.op = add i64 %n, 1 ; <i64> [#uses=1]
18 %tmp1 = select i1 %tmp, i64 %n.op, i64 1 ; <i64> [#uses=1]
22 %i = phi i64 [ %i.next, %for.body ], [ 0, %for.body.preheader ] ; <i64> [#uses=2
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  /external/llvm/test/Transforms/InstCombine/
2007-10-28-stacksave.ll 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
18 %tmp89 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
19 %tmp10 = mul i64 %tmp89, 32 ; <i64> [#uses=0]
21 %tmp1314 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
22 %tmp15 = mul i64 %tmp1314, 32 ; <i64> [#uses=0]
phi.ll 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
200 %i = ptrtoint i32* %a to i64
205 %x = phi i64 [%i, %entry], [%y, %two]
210 %y = phi i64 [%i, %entry], [%x, %one]
215 %f = phi i64 [ %x, %one], [%y, %two]
218 %g = inttoptr i64 %f to i32*
228 define i64 @test12(i1 %cond, i8* %Ptr, i64 %Val) {
230 %tmp41 = ptrtoint i8* %Ptr to i64
231 %tmp42 = zext i64 %tmp41 to i12
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  /external/llvm/test/Transforms/JumpThreading/
lvi-load.ll 2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
6 %"struct.llvm::PointerIntPair<llvm::Use**,2u,llvm::Use::PrevPtrTag,llvm::PointerLikeTypeTraits<llvm::Use**> >" = type { i64 }
19 %0 = getelementptr inbounds %"struct.llvm::Value"* %V, i64 0, i32 1 ; <i8*> [#uses=1]
30 tail call void @__assert_rtn(i8* getelementptr inbounds ([5 x i8]* @_ZZN4llvm4castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_E8__func__, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8]* @.str, i64 0, i64 0), i32 202, i8* getelementptr inbounds ([59 x i8]* @.str1, i64 0, i64 0)) noreturn
  /external/llvm/test/Transforms/LoopSimplify/
merge-exits.ll 3 ; RUN: grep {phi i64} %t | count 1
7 ; that indvars can promote the induction variable to i64
10 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
18 %t1 = sext i32 %hiPart.0 to i64 ; <i64> [#uses=1]
19 %t2 = getelementptr float* %pTmp1, i64 %t1 ; <float*> [#uses=1]
23 %t6 = sext i32 %t5 to i64 ; <i64> [#uses=1]
24 %t7 = getelementptr float* %peakWeight, i64 %t6 ; <float*> [#uses=1]
  /external/llvm/test/Transforms/ScalarRepl/
2011-06-08-VectorExtractValue.ll 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
20 %0 = getelementptr %0* %ref.tmp2, i64 0, i32 0
22 %1 = getelementptr inbounds %struct.Point_3* %tmpcast, i64 0, i32 0
23 %base.i.i.i = getelementptr inbounds %struct.PointC3* %1, i64 0, i32 0
24 %arrayidx.i.i.i.i = getelementptr inbounds %struct.array* %base.i.i.i, i64 0, i32 0, i64 0
38 %0 = getelementptr {<2 x float>, float}* %ref.tmp2, i64 0, i32 0
56 %tmpcast2 = getelementptr {<2 x float>, float}* %ref.tmp2, i64 0, i32 1
57 %0 = getelementptr {<2 x float>, float}* %ref.tmp2, i64 0, i32 0
  /external/llvm/test/CodeGen/ARM/
2007-03-30-RegScavengerAssert.ll 9 %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
20 %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
21 %struct.tree_decl_u1 = type { i64 }
24 %struct.u = type { [1 x i64] }
73 %tmp459 = add i64 0, 1 ; <i64> [#uses=1]
80 %result.5.ph = phi i64 [ 0, %bb464 ], [ %tmp459, %bb457 ] ; <i64> [#uses=1]
84 %indvar.next586 = add i64 %indvar585, 1 ; <i64> [#uses=1
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vst2.ll 52 define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind {
56 %tmp0 = bitcast i64* %A to i8*
57 %tmp1 = load <1 x i64>* %B
58 call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 32)
63 define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind {
66 %A = load i64** %ptr
67 %tmp0 = bitcast i64* %A to i8
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dyn-stackalloc.ll 5 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
  /external/llvm/test/DebugInfo/
printdbginfo2.ll 57 !2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}
60 !5 = metadata !{i32 458771, metadata !1, metadata !"foo", metadata !1, i32 1, i64 32, i64 32, i64 0, i32 0, null, metadata !6, i32 0}
62 !7 = metadata !{i32 458765, metadata !1, metadata !"a", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !2}
64 !9 = metadata !{i32 458753, metadata !1, metadata !"", null, i32 0, i64 128, i64 32, i64 0, i32 0, metadata !2, metadata !10, i32 0
    [all...]
  /external/llvm/test/Transforms/MergeFunc/
vector.ll 9 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
13 %1 = type { i64, i1 }
23 %tmp2.i.i = bitcast %"class.std::vector"* %this to i64**
24 %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0
25 %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null
29 %0 = bitcast i64* %tmp3.i.i to i8*
61 declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
65 declare noalias i8* @_Znwm(i64)
67 declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align
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  /external/llvm/test/Analysis/Dominators/
2007-01-14-BreakCritEdges.ll 4 %struct.OggVorbis_File = type { i8*, i32, i64, i64, %struct.ogg_sync_state, i32, i64*, i64*, i32*, i64*, %struct.vorbis_info*, %struct.vorbis_comment*, i64, i32, i32, i32, double, double, %struct.ogg_stream_state, %struct.vorbis_dsp_state, %struct.vorbis_block, %struct.ov_callbacks }
6 %struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
9 %struct.ov_callbacks = type { i32 (i8*, i32, i32, i8*)*, i32 (i8*, i64, i32)*, i32 (i8*)*, i32 (i8*)*
    [all...]
  /external/llvm/test/Transforms/LoopUnroll/
scevunroll.ll 19 %iv = phi i64 [ 10, %entry ], [ %iv.next, %while.body ]
21 %iv.next = add i64 %iv, -1
22 %adr = getelementptr inbounds i32* %base, i64 %iv.next
25 %iv.narrow = trunc i64 %iv.next to i32
42 define i64 @earlyLoopTest(i64* %base) nounwind {
47 %iv = phi i64 [ 0, %entry ], [ %inc, %tail ]
48 %s = phi i64 [ 0, %entry ], [ %s.next, %tail ]
49 %adr = getelementptr i64* %base, i64 %i
    [all...]
  /external/llvm/lib/Target/Alpha/
AlphaISelLowering.cpp 54 addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass);
83 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
84 setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
85 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand);
86 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
89 setOperationAction(ISD::CTPOP , MVT::i64 , Expand);
90 setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
91 setOperationAction(ISD::CTLZ , MVT::i64 , Expand);
93 setOperationAction(ISD::BSWAP , MVT::i64, Expand);
94 setOperationAction(ISD::ROTL , MVT::i64, Expand)
    [all...]
  /external/llvm/test/Analysis/BasicAA/
2007-12-08-OutOfBoundsCrash.ll 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
7 %struct.pci_device_id = type { i32, i32, i32, i32, i32, i32, i64 }
9 %struct.usb_hcd = type { %struct.usb_bus, [0 x i64] }
24 %tmp601 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 1, i64 2305843009213693951 ; <i64*> [#uses=1]
25 %tmp67 = bitcast i64* %tmp601 to %struct.device** ; <%struct.device**> [#uses=1]
  /external/llvm/test/CodeGen/Generic/
print-shift.ll 15 %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
16 %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
17 %a_shl_s = getelementptr [14 x i8]* @a_shl_str, i64 0, i64 0 ; <i8*> [#uses=1]

Completed in 92 milliseconds

<<41424344454647484950>>