| /external/llvm/test/CodeGen/X86/ |
| ins_subreg_coalesce-3.ll | 4 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
68 %mask498049814982 = zext i16 %tmp49764977 to i64 ; <i64> [#uses=1]
69 %tmp4984 = getelementptr %struct.FONT_INFO* null, i64 %mask498049814982, i32 5 ; <%struct.rec**> [#uses=1]
71 %tmp4988 = getelementptr %struct.rec* %tmp4985, i64 0, i32 0, i32 3 ; <%struct.THIRD_UNION*> [#uses=1]
80 %mask501250135014 = zext i16 %tmp50085009 to i64 ; <i64> [#uses=1]
81 %tmp5016 = getelementptr %struct.FONT_INFO* null, i64 %mask501250135014, i32 5 ; <%struct.rec**> [#uses=1
[all...] |
| vec_logical.ll | 23 %tmp9 = bitcast <2 x double> %a to <2 x i64> ; <<2 x i64>> [#uses=1]
24 %tmp10 = bitcast <2 x double> %b to <2 x i64> ; <<2 x i64>> [#uses=1]
25 %tmp11 = and <2 x i64> %tmp9, %tmp10 ; <<2 x i64>> [#uses=1]
26 %tmp13 = bitcast <2 x i64> %tmp11 to <2 x double> ; <<2 x double>> [#uses=1]
|
| vshift-3.ll | 9 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
13 %ashr = ashr <2 x i64> %val, < i64 32, i64 32 >
14 store <2 x i64> %ashr, <2 x i64>* %dst
|
| 2009-07-15-CoalescerBug.ll | 5 %struct.CLONE_PARAMS = type { %struct.AV*, i64, %struct.PerlInterpreter* }
7 %struct.DIR = type { i32, i64, i64, i8*, i32, i64, i64, i32, %struct.__darwin_pthread_mutex_t, %struct._telldir* }
15 %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8 }
16 %struct.PMOP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8, %struct.OP*, %struct.OP*, %struct.OP*, %struct.OP*, %struct.PMOP*, %struct.REGEXP*, i32, i32, i8, %struct.HV* }
17 %struct.PerlIO_funcs = type { i64, i8*, i64, i32, i64 (%struct.PerlIOl**, i8*, %struct.SV*, %struct.PerlIO_funcs*)*, i64 (%struct.PerlIOl**)*, %struct.P (…)
[all...] |
| sse41.ll | 27 define <2 x i64> @pmovsxbd_1(i32* %p) nounwind {
36 %7 = bitcast <4 x i32> %6 to <2 x i64>
37 ret <2 x i64> %7
47 define <2 x i64> @pmovsxwd_1(i64* %p) nounwind readonly {
49 %0 = load i64* %p ; <i64> [#uses=1]
50 %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0 ; <<2 x i64>> [#uses=1
[all...] |
| 2010-04-23-mmx-movdq2q.ll | 2 ; There are no MMX operations here, so we use XMM or i64.
40 %tmp1 = bitcast double %a to <1 x i64>
41 %tmp2 = bitcast double %b to <1 x i64>
42 %tmp3 = add <1 x i64> %tmp1, %tmp2
44 store <1 x i64> %tmp3, <1 x i64>* null
|
| avx-cvt.ll | 42 define double @funcA(i64* nocapture %e) nounwind uwtable readonly ssp {
44 %tmp1 = load i64* %e, align 8
45 %conv = sitofp i64 %tmp1 to double
66 define float @funcD(i64* nocapture %e) nounwind uwtable readonly ssp {
68 %tmp1 = load i64* %e, align 8
69 %conv = sitofp i64 %tmp1 to float
|
| avx-vperm2f128.ll | 39 define <4 x i64> @E2(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
41 %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
42 ret <4 x i64> %shuffle
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| trip-count5.ll | 8 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
23 %tmp6 = sext i32 %hiPart.035 to i64 ; <i64> [#uses=1]
24 %tmp7 = getelementptr float* %pTmp1, i64 %tmp6 ; <float*> [#uses=1]
28 %tmp15 = sext i32 %tmp12 to i64 ; <i64> [#uses=1]
29 %tmp16 = getelementptr float* %peakWeight, i64 %tmp15 ; <float*> [#uses=1]
|
| max-trip-count.ll | 19 %2 = sext i32 %i.02 to i64 ; <i64> [#uses=1]
20 %3 = getelementptr i32* %d, i64 %2 ; <i32*> [#uses=1]
68 %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %g_4.0) nounwind ; <i32> [#uses=0]
80 %tmp = zext i32 %n to i64
84 %indvar = phi i64 [ %indvar.next, %for.body ], [ 0, %for.body.lr.ph ]
85 %arrayidx = getelementptr i8* %a, i64 %indvar
87 %indvar.next = add i64 %indvar, 1
88 %exitcond = icmp ne i64 %indvar.next, %tm
[all...] |
| /external/llvm/test/Transforms/GVN/ |
| 2009-01-22-SortInvalidation.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
11 %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
17 %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
20 %struct.Context = type { i64, i32, %struct.Fifo }
21 %struct.CountCtx = type { i64 }
22 %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8*
[all...] |
| rle.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
108 ;; i64 -> float forwarding
109 define float @coerce_mustalias6(i64 %V, i64* %P) {
110 store i64 %V, i64* %P
112 %P2 = bitcast i64* %P to float*
121 ;; i64 -> i8* (32-bit) forwarding
122 define i8* @coerce_mustalias7(i64 %V, i64* %P)
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| iv-sext.ll | 4 ; inner loop to i64.
5 ; TODO: it should promote hiPart to i64 in the outer loop too.
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
20 ; CHECK: phi i64
21 ; CHECK-NOT: phi i64
35 %tmp6 = sext i32 %tmp5 to i64 ; <i64> [#uses=1]
36 %tmp7 = getelementptr float* %pTmp1, i64 %tmp6 ; <float*> [#uses=1]
40 %tmp11 = sext i32 %tmp10 to i64 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| load.ll | 19 %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 1, i32 1 ; <float*> [#uses=1]
25 %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 0, i32 0 ; <i32*> [#uses=1]
31 %A = getelementptr [2 x { i32, float }]* @Z, i64 0, i64 1, i32 0 ; <i32*> [#uses=1]
92 define <16 x i8> @test13(<2 x i64> %x) {
|
| /external/llvm/test/Transforms/LoopSimplify/ |
| 2003-08-15-PreheadersFail.ll | 11 store i32* getelementptr ([16386 x i32]* @yy_state_buf, i64 0, i64 0), i32** @yy_state_ptr
13 %inc.0 = getelementptr i32* %tmp.35, i64 1 ; <i32*> [#uses=1]
21 %tmp.92 = sext i32 %tmp.91 to i64 ; <i64> [#uses=1]
22 %tmp.93 = getelementptr [787 x i16]* @yy_base, i64 0, i64 %tmp.92 ; <i16*> [#uses=1]
|
| /external/qemu/tcg/ |
| README | 78 taking i32, i64 or pointer types. By default, before calling a helper,
144 * brcond_i32/i64 cond, t0, t1, label
160 * add_i32/i64 t0, t1, t2
164 * sub_i32/i64 t0, t1, t2
168 * neg_i32/i64 t0, t1
172 * mul_i32/i64 t0, t1, t2
176 * div_i32/i64 t0, t1, t2
180 * divu_i32/i64 t0, t1, t2
184 * rem_i32/i64 t0, t1, t2
188 * remu_i32/i64 t0, t1, t
[all...] |
| /external/llvm/test/Transforms/JumpThreading/ |
| 2010-08-26-and.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
24 %tmp144 = zext i32 %tmp to i64 ; <i64> [#uses=1]
25 %tmp145 = add i64 %tmp144, 1 ; <i64> [#uses=1]
30 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp146, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 ] ; <i64> [#uses=1]
31 %tmp146 = add i64 %indvar, 1 ; <i64> [#uses=3]
32 %arrayidx = getelementptr i8** %argv, i64 %tmp146 ; <i8**> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2011-01-19-MergedGlobalDbg.ll | 3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32"
34 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30
36 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30
41 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
45 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32
47 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32
54 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34
56 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34
63 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36
65 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !3
[all...] |
| 2011-08-02-MergedGlobalDbg.ll | 25 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32"
35 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10), !dbg !30
37 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11), !dbg !31
43 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13), !dbg !32
45 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14), !dbg !33
51 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16), !dbg !34
53 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17), !dbg !35
59 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19), !dbg !36
61 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20), !dbg !37
67 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27), !dbg !3
[all...] |
| crash.ll | 34 %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> <i32 1>
35 %tmp8 = bitcast <1 x i64> %tmp to <2 x float>
55 %tmp76 = shufflevector <2 x i64> zeroinitializer, <2 x i64> zeroinitializer, <1 x i32> <i32 1>
56 %tmp77 = bitcast <1 x i64> %tmp76 to <2 x float>
|
| fast-isel-pred.ll | 45 %data = alloca i64, align 4
50 %tmp = load i64* %data, align 4
54 %0 = bitcast i8* %add.ptr to i64*
55 %arrayidx = getelementptr inbounds i64* %0, i32 0
56 store i64 %tmp, i64* %arrayidx
|
| /external/clang/test/CodeGenCXX/ |
| anonymous-union-member-initializer.cpp | 13 // CHECK: @_ZN11rdar88182363fooE = global i64 4
38 // CHECK: store i64 1, i64
41 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
45 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
105 // CHECK-NEXT: [[XADDR:%[a-zA-z0-9.]+]] = alloca i64
107 // CHECK-NEXT: store i64 [[X:%[a-zA-z0-9.]+]], i64* [[XADDR]]
112 // CHECK-NEXT: [[TMP:%[a-zA-z0-9.]+]] = load i64* [[XADDR]]
113 // CHECK-NEXT: [[CONV:%[a-zA-z0-9.]+]] = trunc i64 [[TMP]] to i3
[all...] |
| delete.cpp | 75 // CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8* [[T0]], i64 -8
76 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[ALLOC]] to i64*
77 // CHECK-NEXT: [[COUNT:%.*]] = load i64* [[T1]]
78 // CHECK: [[END:%.*]] = getelementptr inbounds [[A]]* [[BEGIN]], i64 [[COUNT]]
82 // CHECK-NEXT: [[CUR:%.*]] = getelementptr inbounds [[A]]* [[PAST]], i64 -1
117 // CHECK-NEXT: [[VFN:%.*]] = getelementptr inbounds void ([[X]])** [[VTABLE]], i64 0
|
| /external/clang/test/CodeGenObjC/ |
| arc-weak-property.m | 20 // CHECK-NEXT: [[T1:%.*]] = load i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP"
22 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8* [[T2]], i64 [[T1]]
37 // CHECK-NEXT: [[T1:%.*]] = load i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP"
39 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8* [[T2]], i64 [[T1]]
50 // CHECK-NEXT: [[T1:%.*]] = load i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP"
52 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8* [[T2]], i64 [[T1]]
|
| /external/llvm/test/CodeGen/Thumb/ |
| dyn-stackalloc.ll | 4 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
|
