| /external/llvm/test/Transforms/SimplifyCFG/ |
| dbginfo.ll | 4 %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
6 %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
7 %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
10 %llvm.dbg.subrange.type = type { i32, i64, i64
[all...] |
| /external/llvm/test/Transforms/ScalarRepl/ |
| crash.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
24 %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1]
25 %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0]
31 %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx-intrinsics-x86.ll | 3 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
5 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
6 ret <2 x i64> %res
8 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnon
[all...] |
| 2006-10-19-SwitchUnnecessaryBranching.ll | 18 %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0]
22 %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str.upgrd.1, i32 0, i64 0) ) ; <i32> [#uses=0]
|
| 2007-11-04-rip-immediate-constant.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
9 tail call void asm sideeffect "foo ${0:c}\0A", "i,~{dirflag},~{fpsr},~{flags}"( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) )
|
| 2008-06-13-NotVolatileLoadStore.ll | 12 define i16 @f(i64 %x) {
13 %b = bitcast i64 %x to double ; <double> [#uses=1]
|
| 2008-08-25-AsmRegTypeMismatch.ll | 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
10 %"struct.nsXPTCMiniVariant::._39" = type { i64 }
|
| 2009-02-12-InlineAsm-nieZ-constraints.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
22 call void asm sideeffect "foo $0", "Z,~{dirflag},~{fpsr},~{flags}"(i64 4294885376) nounwind
|
| 2009-03-09-APIntCrash.ll | 3 %struct.__block_descriptor = type { i64, i64 }
|
| 2009-09-22-CoalescerBug.ll | 50 %.cast.i = zext i32 undef to i64 ; <i64> [#uses=1]
57 %0 = load i64* undef, align 8 ; <i64> [#uses=1]
58 %1 = shl i64 %0, %.cast.i ; <i64> [#uses=1]
59 store i64 %1, i64* undef, align 8
|
| crash.ll | 10 %conv.i = zext i32 %tmp5.i to i64 ; <i64> [#uses=1]
12 %conv13.i = zext i32 %tmp12.i to i64 ; <i64> [#uses=1]
13 %shl.i = shl i64 %conv13.i, 32 ; <i64> [#uses=1]
14 %or.i = or i64 %shl.i, %conv.i ; <i64> [#uses=1]
15 %add16.i = add i64 %or.i, 256 ; <i64> [#uses=1
[all...] |
| /external/clang/test/CodeGenObjCXX/ |
| copy.mm | 17 // CHECK-NEXT: call void @llvm.memset.p0i8.i64(
20 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(
|
| mangle-blocks.mm | 3 // CHECK: @_ZGVN3foo20__foo_block_invoke_05valueE = internal global i64 0
9 // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVN3foo20__foo_block_invoke_05value
|
| /external/libyuv/files/include/libyuv/ |
| basic_types.h | 35 #define INT64_C(x) x ## I64
40 #define INT64_F "I64"
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZCallingConv.td | 16 // Promote i8/i16/i32 arguments to i64.
17 CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
19 // i64 is returned in register R2
20 CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
31 // Promote i8/i16/i32 arguments to i64.
32 CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
36 CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D, R6D]>>,
45 CCIfType<[i64, f32, f64], CCAssignToStack<8, 8>>
|
| /external/llvm/test/CodeGen/ARM/ |
| debug-info-sreg2.ll | 3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
17 tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5), !dbg !11
40 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
49 !3 = metadata !{i32 589845, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
53 !7 = metadata !{i32 589860, metadata !0, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
|
| /external/llvm/test/CodeGen/Alpha/ |
| 2006-01-18-MissedGlobal.ll | 6 %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [44 x i8] }
|
| jmp_table.ll | 43 %tmp.upgrd.2 = getelementptr [2 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1]
48 %tmp2 = getelementptr [2 x i8]* @str1, i32 0, i64 0 ; <i8*> [#uses=1]
53 %tmp4 = getelementptr [2 x i8]* @str2, i32 0, i64 0 ; <i8*> [#uses=1]
58 %tmp6 = getelementptr [2 x i8]* @str3, i32 0, i64 0 ; <i8*> [#uses=1]
63 %tmp8 = getelementptr [2 x i8]* @str4, i32 0, i64 0 ; <i8*> [#uses=1]
68 %tmp10 = getelementptr [2 x i8]* @str5, i32 0, i64 0 ; <i8*> [#uses=1]
73 %tmp12 = getelementptr [2 x i8]* @str6, i32 0, i64 0 ; <i8*> [#uses=1]
78 %tmp14 = getelementptr [2 x i8]* @str7, i32 0, i64 0 ; <i8*> [#uses=1]
|
| /external/llvm/test/CodeGen/CellSPU/ |
| 2009-01-01-BrCond.ll | 4 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
6 %struct.anon = type { i64 }
|
| /external/llvm/test/CodeGen/Generic/ |
| 2009-03-17-LSR-APInt.ll | 25 %struct.QWidgetData = type { i64, i32, %struct.Alignment, i8, i8, i16, %struct.QRect, %struct.QPalette, %struct.QFont, %struct.QRect }
27 %struct.pthread_attr_t = type { i64, [48 x i8] }
36 @_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
37 @_ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
72 declare i32 @pthread_create(i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
74 declare i32 @pthread_cancel(i64)
|
| ConstantExprLowering.ll | 19 %tmp.39 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @.str_1, i64 0, i64 0), i32 %t2 ) ; <i32> [#uses=0]
|
| print-add.ll | 8 %f = getelementptr [4 x i8]* @.str_1, i64 0, i64 0 ; <i8*> [#uses=3]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-08-04-CoalescerAssert.ll | 5 %struct.obstack = type { i8*, %struct._obstack_chunk* (i8*, i64)*, i8*, i8 }
15 %tmp22 = tail call %struct._obstack_chunk* null( i64 undef ) ; <%struct._obstack_chunk*> [#uses=2]
|
| mask64.ll | 3 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
5 %struct.re_pattern_buffer = type <{ i8*, i64, i8, [7 x i8] }>
|
| /external/llvm/test/CodeGen/SystemZ/ |
| 10-GlobalsPic.ll | 3 target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
26 %arrayidx = getelementptr i32* %tmp1, i64 1 ; <i32*> [#uses=1]
|
