/external/llvm/test/Transforms/ObjCARC/ |
cfg-hazards.ll | 26 %upcDigitIndex.01 = phi i64 [ 2, %entry ], [ %inc, %for.body ] 28 %inc = add i64 %upcDigitIndex.01, 1 29 %cmp = icmp ult i64 %inc, 12 50 %upcDigitIndex.01 = phi i64 [ 2, %entry ], [ %inc, %for.body ] 53 %inc = add i64 %upcDigitIndex.01, 1 54 %cmp = icmp ult i64 %inc, 12 75 %upcDigitIndex.01 = phi i64 [ 2, %entry ], [ %inc, %for.body ] 77 %inc = add i64 %upcDigitIndex.01, 1 78 %cmp = icmp ult i64 %inc, 12
|
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 68 /// i64. 70 return CurDAG->getTargetConstant(Imm, MVT::i64); 288 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i64) { 334 // Don't even go down this path for i64, since different logic will be 492 } else if (LHS.getValueType() == MVT::i64) { 498 return SDValue(CurDAG->getMachineNode(PPC::CMPLDI, dl, MVT::i64, LHS, 502 return SDValue(CurDAG->getMachineNode(PPC::CMPDI, dl, MVT::i64, LHS, 515 SDValue Xor(CurDAG->getMachineNode(PPC::XORIS8, dl, MVT::i64, LHS, 517 return SDValue(CurDAG->getMachineNode(PPC::CMPLDI, dl, MVT::i64, Xor, 524 return SDValue(CurDAG->getMachineNode(PPC::CMPLDI, dl, MVT::i64, LHS [all...] |
/external/llvm/test/Transforms/InstCombine/ |
icmp.ll | 4 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 49 define <2 x i1> @test5(<2 x i64> %x) { 51 %V = icmp eq <2 x i64> %x, undef 120 %S = select i1 %A, i64 -4294967295, i64 8589934591 121 %B = icmp ne i64 bitcast (<2 x i32> <i32 1, i32 -1> to i64), %S 229 ; CHECK: %cmp = icmp eq i64 %i, 1000 231 define i1 @test24(i64 %i) { 232 %p1 = getelementptr inbounds i32* getelementptr inbounds ([1000 x i32]* @X, i64 0, i64 0), i64 % [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaInstrFormats.td | 20 def u8imm : Operand<i64>; 21 def s14imm : Operand<i64>; 22 def s16imm : Operand<i64>; 23 def s21imm : Operand<i64>; 24 def s64imm : Operand<i64>; 25 def u64imm : Operand<i64>;
|
/external/llvm/lib/Target/Mips/ |
MipsCallingConv.td | 40 // Promote i8/i16/i32 arguments to i64. 41 CCIfType<[i8, i16, i32], CCPromoteToType<i64>>, 44 CCIfType<[i64], CCAssignToRegWithShadow<[A0_64, A1_64, A2_64, A3_64, 62 CCIfType<[i64, f64], CCAssignToStack<8, 8>>, 72 // i64 are returned in registers V0_64, V1_64 73 CCIfType<[i64], CCAssignToReg<[V0_64, V1_64]>>,
|
/external/llvm/test/CodeGen/X86/ |
2008-04-17-CoalescerBug.ll | 7 %struct.wxLongLong = type { i64 } 83 %tmp61.i.i8486 = icmp sgt i64 0, -1 ; <i1> [#uses=1] 84 %tmp95.i.i8490 = icmp slt i64 0, 2147483647000 ; <i1> [#uses=1] 98 %tmp245.i8588 = srem i64 0, 86400000 ; <i64> [#uses=1] 103 %tmp268269.i8593 = trunc i64 %tmp245.i8588 to i32 ; <i32> [#uses=1]
|
sibcall.ll | 222 %struct.__block_descriptor = type { i64, i64 } 223 %struct.__block_descriptor_withcopydispose = type { i64, i64, i8*, i8* } 233 %0 = getelementptr inbounds %struct.__block_literal_2* %.block_descriptor, i64 0, i32 5 ; <void ()**> [#uses=1] 236 %3 = getelementptr inbounds %struct.__block_literal_1* %2, i64 0, i32 3 ; <i8**> [#uses=1]
|
abi-isel.ll | 36 %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4 37 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 0), align 4 108 %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4 109 store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 0), align 4 301 %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4 383 %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4 464 %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 465 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 0), align 32 580 %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 651 %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align [all...] |
/external/llvm/test/MC/ARM/ |
neon-add-encoding.s | 8 @ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf2] 9 vadd.i64 d16, d17, d16 130 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2] 131 vaddhn.i64 d16, q8, q9 136 @ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf3] 137 vraddhn.i64 d16, q8, q9
|
neon-mov-encoding.s | 12 vmov.i64 d16, #0xFF0000FF0000FFFF 23 @ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3] 36 vmov.i64 q8, #0xFF0000FF0000FFFF 47 @ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3] 84 vmovn.i64 d16, q8 97 @ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xf3]
|
neont2-add-encoding.s | 9 @ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0x71,0xef,0xa0,0x08] 10 vadd.i64 d16, d17, d16 131 @ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04] 132 vaddhn.i64 d16, q8, q9 137 @ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xff,0xa2,0x04] 138 vraddhn.i64 d16, q8, q9
|
neont2-mov-encoding.s | 14 vmov.i64 d16, #0xFF0000FF0000FFFF 25 @ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x33,0x0e] 37 vmov.i64 q8, #0xFF0000FF0000FFFF 48 @ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x73,0x0e] 78 vmovn.i64 d16, q8 97 @ CHECK: vmovn.i64 d16, q8 @ encoding: [0xfa,0xff,0x20,0x02]
|
neont2-shift-encoding.s | 19 @ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x05] 20 vshl.i64 d16, d16, #63 35 @ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x05] 36 vshl.i64 q8, q8, #63 91 @ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x08] 92 vshrn.i64 d16, q8, #32 161 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08] 162 vrshrn.i64 d16, q8, #32
|
/external/llvm/test/Transforms/InstSimplify/ |
compare.ll | 15 %e1 = zext i32 %x to i64 16 %e2 = zext i32 %x to i64 17 %r = icmp eq i64 %e1, %e2 40 %e1 = sext i32 %x to i64 41 %e2 = sext i32 %x to i64 42 %r = icmp eq i64 %e1, %e2
|
/external/llvm/test/Transforms/LoopUnroll/ |
2007-11-05-Crash.ll | 6 %struct.cl_limits = type { i32, i32, i32, i32, i16, i64 } 11 %struct.cli_ctx = type { i8**, i64*, %struct.cli_matcher*, %struct.cl_engine*, %struct.cl_limits*, i32, i32, i32, i32, %struct.cli_dconf* } 15 declare i8* @calloc(i64, i64) 226 %tmp10.i.i527 = call i8* @calloc( i64 0, i64 1 ) ; <i8*> [#uses=1]
|
/external/llvm/lib/Target/X86/ |
X86InstrCompiler.td | 189 // Materialize i64 constant where top 32-bits are zero. This could theoretically 220 def : Pat<(i64 (anyext (i8 (X86setcc_c X86_COND_B, EFLAGS)))), 227 def : Pat<(i64 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))), 242 def : Pat<(add (and (i64 (X86setcc_c X86_COND_B, EFLAGS)), 1), GR64:$op), 250 def : Pat<(sub GR64:$op, (and (i64 (X86setcc_c X86_COND_B, EFLAGS)), 1)), 258 def : Pat<(sub GR64:$op, (i64 (X86setcc_c X86_COND_B, EFLAGS))), 275 [(X86rep_movs i64)]>, REP; 291 [(X86rep_stos i64)]>, REP; [all...] |
/external/chromium/third_party/libjingle/source/talk/base/ |
basictypes.h | 56 #define INT64_C(x) x ## I64 61 #define INT64_F "I64"
|
/external/clang/test/CodeGenCXX/ |
constructors.cpp | 32 // CHECK: define void @_ZN1AC1E10ValueClass(%struct.A* %this, i64 %v.coerce) unnamed_addr 35 // CHECK: define void @_ZN1AC2E10ValueClass(%struct.A* %this, i64 %v.coerce) unnamed_addr
|
/external/clang/test/Driver/ |
le32-unknown-nacl.cpp | 95 // CHECK: i64 @check_longlong() 110 // CHECK: i64 @check_ulonglong()
|
/external/llvm/test/CodeGen/ARM/ |
fcopysign.ll | 26 ; HARD: vshl.i64 [[REG2]], [[REG2]], #32 36 ; SOFT: vshl.i64 [[REG3]], [[REG3]], #32
|
inlineasm3.ll | 8 ; CHECK: vmov.I64 q15, #0 12 call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind
|
/external/llvm/test/CodeGen/CellSPU/ |
call_indirect.ll | 19 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128" 41 @ptr_list = internal global [1 x void ()*] [ void ()* inttoptr (i64 4294967295 to void ()*) ], align 4
|
/external/llvm/test/CodeGen/Generic/ |
crash.ll | 53 %f13576.pre = getelementptr inbounds %struct.S0* undef, i64 0, i32 1 60 %f135.pre = getelementptr inbounds %struct.S0* undef, i64 0, i32 1
|
/external/llvm/test/Transforms/GVN/ |
2011-09-07-TypeIdFor.ll | 18 declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*) 26 %0 = landingpad { i8*, i32 } personality i32 (i32, i64, i8*, i8*)* @__gxx_personality_v0
|
/external/llvm/test/Transforms/LoopUnswitch/ |
crash.ll | 50 define i32* @test3(i32** %p_45, i16 zeroext %p_46, i64 %p_47, i64 %p_48, i16 signext %p_49) nounwind {
|