| /external/llvm/test/Transforms/IndVarSimplify/ |
| 2008-09-02-IVType.ll | 10 %struct.JPEGGlobals = type { [2048 x i8], %struct.JPEGBitStream, i8*, i32, i32, %struct.ComponentInstanceRecord*, %struct.ComponentInstanceRecord*, i32, %struct.OpaqueQTMLMutex*, %struct.Rect, i32, i32, %struct.SharedGlobals, %struct.DCPredictors, i8, i8, void (i8*, i16**, i32, %struct.YUVGeneralParams*)*, %struct.YUVGeneralParams, i16, i16, i32, [5 x i16*], [5 x %struct.DecodeTable*], [5 x %struct.DecodeTable*], [5 x i8], [5 x i8], [4 x [65 x i16]], [4 x %struct.DecodeTable], [4 x %struct.DecodeTable], [4 x i8*], [4 x i8*], i16, i16, i32, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, [18 x i8], [18 x i8], [18 x i8], [18 x i8], i32, i32, i8**, i8**, i8, i8, i8, i8, i16, i16, %struct.App1Marker*, i8, i8, i8, i8, i32**, i8*, i16*, i8*, i16*, i8, [3 x i8], i32, [3 x i32], [3 x i32], [3 x i32], [3 x i32], [3 x i32], [3 x i16*], [3 x i16*], [3 x i8**], [3 x %struct.DecodeTable*], [3 x %struct.DecodeTable*], [3 x i32], i32, [3 x i16*], i32, i32, i32, [3 x i32], i8, i8, i8, i8, %struct.ICMDataProcRecord*, i32, i32, i8**, i8**, i8**, i8**, i32, i32, i8*, i32, i32, i16*, i16*, i8*, i32, i32, i32, i32, i32, i32, i32, [16 x <2 x i64>], [1280 x i8], i8 }
|
| ada-loops.ll | 17 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32"
|
| loop_evaluate9.ll | 8 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
|
| /external/llvm/test/Transforms/Inline/ |
| devirtualize-3.ll | 8 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
|
| /external/llvm/test/Transforms/InstCombine/ |
| bswap.ll | 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
|
| call.ll | 4 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
|
| signext.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| 2011-10-13-SCEVChain.ll | 105 %inc = getelementptr inbounds i8* %iv, i64 1
|
| /external/llvm/test/Transforms/LoopUnswitch/ |
| 2007-08-01-LCSSA.ll | 3 %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| switch_formation.dbg.ll | 20 %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
|
| /external/mesa3d/include/c99/ |
| stdint.h | 233 #define INT64_C(val) val##i64
|
| /frameworks/base/tests/RenderScriptTests/tests/src/com/android/rs/test/ |
| vector.rs | 151 rsDebug("Testing I64", 0);
|
| /external/llvm/lib/Target/X86/ |
| README.txt | 943 define i64 @test(double %X) {
944 %Y = fptosi double %X to i64
945 ret i64 %Y
1220 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-S128"
[all...] |
| X86FastISel.cpp | 166 // under the assumption that i64 won't be used if the target doesn't
196 case MVT::i64:
252 case MVT::i64: Opc = X86::MOV64mr; break; // Must be in x86-64 mode.
282 // Handle 'null' like i32/i64 0.
296 case MVT::i64:
548 if (TLI.getPointerTy() == MVT::i64) {
848 case MVT::i64: return X86::CMP64rr;
866 case MVT::i64:
880 // Handle 'null' like i32/i64 0.
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.td | 26 class SDTCisI64<int OpNum> : SDTCisVT<OpNum, i64>;
38 SDTCisI8<1>, SDTCisVT<2, i64>]>;
41 SDTCisI8<3>, SDTCisVT<4, i64>]>;
342 [(store (i64 immSExt16:$src), riaddr12:$dst)]>,
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| neon.txt | 121 # CHECK: vadd.i64 d16, d17, d16
243 # CHECK: vaddhn.i64 d16, q8, q9
249 # CHECK: vraddhn.i64 d16, q8, q9
594 # CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF
614 # CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF
648 # CHECK: vmovn.i64 d16, q8
1147 # CHECK: vshl.i64 d16, d16, #63
1163 # CHECK: vshl.i64 q8, q8, #63
1283 # CHECK: vshrn.i64 d16, q8, #32
1353 # CHECK: vrshrn.i64 d16, q8, #3
[all...] |
| /cts/tests/tests/renderscript/src/android/renderscript/cts/ |
| ForEachTest.java | 237 // I64
239 t = new Type.Builder(mRS, Element.I64(mRS)).setX(x).create();
|
| TypeTest.java | 62 testTypeBuilderHelper(Element.I64(mRS));
|
| /external/llvm/lib/CodeGen/ |
| README.txt | 124 %z = div i64 %x, %y
127 If the i64 division is lowered to a libcall, then a safe point will (must)
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 243 assert(Node->getValueType(0) != MVT::i64 &&
275 assert((Opcode == ISD::MUL || Node->getValueType(0) != MVT::i64) &&
|
| MipsRegisterInfo.td | 258 def CPU64Regs : RegisterClass<"Mips", [i64], 64, (add
298 def HILO64 : RegisterClass<"Mips", [i64], 64, (add HI64, LO64)> {
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.td | 283 def G8RC : RegisterClass<"PPC", [i64], 64, (add (sequence "X%u", 2, 12),
322 def CTRRC8 : RegisterClass<"PPC", [i64], 64, (add CTR8)>;
|
| /external/qemu/tcg/ |
| tcg.h | 150 int i64; member in struct:__anon10241
158 #define GET_TCGV_I64(t) ((t).i64)
|
| /external/v8/src/ |
| globals.h | 151 #define V8_INT64_C(x) (x ## I64)
152 #define V8_INTPTR_C(x) (x ## I64)
|
| /ndk/sources/host-tools/sed-4.2.1/m4/ |
| stdint.m4 | 396 for glsuf in "$glsufu" ${glsufu}l ${glsufu}ll ${glsufu}i64; do
401 i64) gltype1='__int64';;
|
