| /external/llvm/test/Transforms/GlobalOpt/ |
| globalsra-unknown-index.ll | 15 store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 ptrtoint (i8* @addr to i64)), align 4
18 define i32 @borf(i64 %i, i64 %j) {
19 %p = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0
21 %q = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64
[all...] |
| 2009-11-16-MallocSingleStoreToGlobalVar.ll | 7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
10 @TOP = internal global i64* null ; <i64**> [#uses=2]
11 ; CHECK: @TOP = internal unnamed_addr global i64* null
12 @channelColumns = internal global i64 0 ; <i64*> [#uses=2]
16 store i64 2335, i64* @channelColumns, align 8
17 %1 = load i64* @channelColumns, align 8 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| udiv-simplify-bug-0.ll | 1 ; RUN: opt < %s -instcombine -S | grep {ret i64 0} | count 2
3 define i64 @foo(i32 %x) nounwind {
6 %z = sext i32 %r to i64
7 ret i64 %z
9 define i64 @bar(i32 %x) nounwind {
12 %z = sext i32 %r to i64
13 ret i64 %z
|
| udiv_select_to_select_shift.ll | 9 define i64 @test(i64 %X, i1 %Cond ) {
11 %divisor1 = select i1 %Cond, i64 16, i64 8
12 %quotient1 = udiv i64 %X, %divisor1
13 %divisor2 = select i1 %Cond, i64 8, i64 0
14 %quotient2 = udiv i64 %X, %divisor2
15 %sum = add i64 %quotient1, %quotient2
16 ret i64 %su
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2009-09-27-CoalescerBug.ll | 8 define arm_aapcs_vfpcc i64 @__fixsfdi(float %a) nounwind {
15 %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
16 %3 = sub i64 0, %2 ; <i64> [#uses=1]
17 ret i64 %3
20 %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
21 ret i64 %4
24 declare arm_aapcs_vfpcc i64 @__fixunssfdi(float
[all...] |
| long_shift.ll | 3 define i64 @f0(i64 %A, i64 %B) {
9 %tmp = bitcast i64 %A to i64
10 %tmp2 = lshr i64 %B, 1
11 %tmp3 = sub i64 %tmp, %tmp2
12 ret i64 %tmp3
15 define i32 @f1(i64 %x, i64 %y)
[all...] |
| /external/llvm/test/CodeGen/Alpha/ |
| ctpop.ll | 10 declare i64 @llvm.ctpop.i64(i64)
12 define i64 @bar(i64 %x) {
14 %tmp.1 = call i64 @llvm.ctpop.i64( i64 %x ) ; <i64> [#uses=1]
15 ret i64 %tmp.
[all...] |
| /external/llvm/test/CodeGen/Blackfin/ |
| ctlz64.ll | 5 define i32 @main(i64 %arg) nounwind {
7 %tmp47 = tail call i64 @llvm.cttz.i64(i64 %arg) ; <i64> [#uses=1]
8 %tmp48 = trunc i64 %tmp47 to i32 ; <i32> [#uses=1]
9 %tmp40 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 0, i32 %tmp48, i32 0) nounwind ; <i32> [#uses=0]
15 declare i64 @llvm.cttz.i64(i64) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 05-LoadAddr.ll | 3 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
6 define i64* @foo(i64* %a, i64 %idx) nounwind readnone {
8 %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
9 %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
10 ret i64* %add.ptr
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| andimm8.ll | 6 define i64 @bra(i32 %zed) nounwind {
7 %t1 = zext i32 %zed to i64
8 %t2 = and i64 %t1, 4294967232
9 ret i64 %t2
14 define void @foo(i64 %zed, i64* %x) nounwind {
15 %t1 = and i64 %zed, -4
16 %t2 = or i64 %t1, 2
17 store i64 %t2, i64* %x, align
[all...] |
| narrow-shl-cst.ll | 31 define i64 @test4(i64 %x) nounwind {
32 %and = shl i64 %x, 40
33 %shl = and i64 %and, 264982302294016
34 ret i64 %shl
40 define i64 @test5(i64 %x) nounwind {
41 %and = shl i64 %x, 40
42 %shl = and i64 %and, 34084860461056
43 ret i64 %sh
[all...] |
| 2010-05-16-nosseconversion.ll | 4 @x = common global i64 0 ; <i64*> [#uses=1]
8 %0 = load i64* @x, align 8 ; <i64> [#uses=1]
9 %1 = uitofp i64 %0 to double ; <double> [#uses=1]
|
| bitcast2.ll | 4 define i64 @test1(double %A) {
5 %B = bitcast double %A to i64
6 ret i64 %B
9 define double @test2(i64 %A) {
10 %B = bitcast i64 %A to double
|
| epilogue.ll | 4 declare void @bar(<2 x i64>* %n)
6 define void @foo(i64 %h) {
7 %k = trunc i64 %h to i32
8 %p = alloca <2 x i64>, i32 %k
9 call void @bar(<2 x i64>* %p)
|
| variable-sized-darwin-bzero.ll | 3 define void @foo(i8* %p, i64 %n) {
4 call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 %n, i32 4, i1 false)
8 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
|
| vec_shift3.ll | 5 define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind {
7 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
8 ret <2 x i64> %tmp3
11 define <2 x i64> @t2(<2 x i64> %x1) nounwind {
13 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1
[all...] |
| 2009-11-16-MachineLICM.ll | 14 %tmp = zext i32 %n to i64 ; <i64> [#uses=1]
19 %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=2]
20 %tmp9 = shl i64 %indvar, 2 ; <i64> [#uses=4]
21 %tmp1016 = or i64 %tmp9, 1 ; <i64> [#uses=1]
22 %scevgep = getelementptr float* %x, i64 %tmp1016 ; <float*> [#uses=1]
23 %tmp1117 = or i64 %tmp9, 2 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/GVN/ |
| 2007-07-25-Loop.ll | 5 define void @print_arch(i8* %arch_file, i32 %route_type, i64 %det_routing_arch.0.0, i64 %det_routing_arch.0.1, i64 %det_routing_arch.0.2, i64 %det_routing_arch.0.3, i64 %det_routing_arch.0.4, %struct.s_segment_inf* %segment_inf, i64 %timing_inf.0.0, i64 %timing_inf.0.1, i64 %timing_inf.0.2, i64 %timing_inf.0.3, i64 %timing_inf.0.4, i32 %timing_inf.1)
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
10 define void @simple(i64 %arg, double* %arg3) nounwind {
12 %t = icmp slt i64 0, %arg ; <i1> [#uses=1]
19 %t6 = phi i64 [ %t9, %bb5 ], [ 0, %bb4 ] ; <i64> [#uses=2]
20 %t7 = srem i64 %t6, %arg ; <i64> [#uses=1]
21 %t8 = getelementptr inbounds double* %arg3, i64 %t7 ; <double*> [#uses=1]
23 %t9 = add nsw i64 %t6, 1 ; <i64> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| addc.ll | 4 define void @f(i64 %l, i64* nocapture %p) nounwind {
9 %add = add i64 %l, 1311768467294899695
10 store i64 %add, i64* %p, align 4
|
| /external/llvm/test/CodeGen/PowerPC/ |
| big-endian-actual-args.ll | 6 define i64 @foo(i64 %x, i64 %y) {
7 %z = add i64 %x, %y
8 ret i64 %z
|
| big-endian-call-result.ll | 6 declare i64 @foo()
8 define i64 @bar()
10 %t = call i64 @foo()
11 %s = add i64 %t, 1
12 ret i64 %s
|
| cmp-cmp.ll | 3 define void @test(i64 %X) {
4 %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]
5 %tmp = icmp sgt i64 %tmp1, 2 ; <i1> [#uses=1]
8 tail call void @test( i64 0 )
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-sub5.ll | 3 define i64 @f1(i64 %a, i64 %b) {
8 %tmp = sub i64 %a, %b
9 ret i64 %tmp
|
| /external/llvm/test/CodeGen/XCore/ |
| mul64.ll | 3 define i64 @umul_lohi(i32 %a, i32 %b) {
5 %0 = zext i32 %a to i64
6 %1 = zext i32 %b to i64
7 %2 = mul i64 %1, %0
8 ret i64 %2
15 define i64 @smul_lohi(i32 %a, i32 %b) {
17 %0 = sext i32 %a to i64
18 %1 = sext i32 %b to i64
19 %2 = mul i64 %1, %0
20 ret i64 %
[all...] |
