| /external/llvm/test/CodeGen/X86/ |
| vec_call.ll | 8 tail call void @xx( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <2 x i64> bitcast (<4 x i32> < i32 4, i32 3, i32 2, i32 1 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 8, i32 7, i32 6, i32 5 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 6, i32 4, i32 2, i32 0 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 8, i32 4, i32 2, i32 1 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 0, i32 1, i32 3, i32 9 > to <2 x i64>) )
[all...] |
| avx-intrinsics-x86_64.ll | 3 define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
5 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
6 ret i64 %res
8 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
11 define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
13 %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
16 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
19 define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) {
21 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1
[all...] |
| vec_shuffle-14.ll | 14 define <2 x i64> @t2(i64 %a) nounwind {
16 %tmp = insertelement <2 x i64> undef, i64 %a, i32 0
17 %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1]
18 ret <2 x i64> %tmp6
21 define <2 x i64> @t3(<2 x i64>* %a) nounwind {
23 %tmp4 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1
[all...] |
| bmi.ll | 21 define i64 @t3(i64 %x) nounwind {
22 %tmp = tail call i64 @llvm.cttz.i64( i64 %x )
23 ret i64 %tmp
28 declare i64 @llvm.cttz.i64(i64) nounwind readnone
47 define i64 @andn64(i64 %x, i64 %y) nounwind readnone
[all...] |
| 2009-12-11-TLSNoRedZone.ll | 6 %0 = type { [1 x i64] }
10 @data = global [2 x i64] zeroinitializer, align 64 ; <[2 x i64]*> [#uses=1]
11 @ptr = linkonce thread_local global [1 x i64] [i64 ptrtoint ([2 x i64]* @data to i64)], align 64 ; <[1 x i64]*> [#uses=1]
12 @link_ptr = linkonce thread_local global [1 x i64] zeroinitializer, align 64 ; <[1 x i64]*> [#uses=1
[all...] |
| lea-3.ll | 5 define i64 @test2(i64 %a) {
6 %tmp2 = shl i64 %a, 2
7 %tmp3 = or i64 %tmp2, %a
8 ret i64 %tmp3
18 define i64 @test3(i64 %a) {
19 %tmp2 = shl i64 %a, 3
20 ret i64 %tmp2
|
| vec_shift.ll | 5 define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
7 %tmp6 = bitcast <2 x i64> %c to <8 x i16> ; <<8 x i16>> [#uses=1]
8 %tmp8 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1]
10 %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
11 ret <2 x i64> %tmp10
14 define <2 x i64> @t3(<2 x i64> %b1, i32 %c) nounwind
[all...] |
| atomic-or.ll | 5 define void @t1(i64* %p, i32 %b) nounwind {
7 %p.addr = alloca i64*, align 8
8 store i64* %p, i64** %p.addr, align 8
9 %tmp = load i64** %p.addr, align 8
14 %0 = atomicrmw or i64* %tmp, i64 2147483648 seq_cst
18 define void @t2(i64* %p, i32 %b) nounwind {
20 %p.addr = alloca i64*, align 8
21 store i64* %p, i64** %p.addr, align
[all...] |
| byval7.ll | 3 %struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
4 <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
5 <2 x i64> }
15 %tmp15 = getelementptr %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1
[all...] |
| fold-sext-trunc.ll | 4 %0 = type { i64 } ; type %0
8 declare void @func_28(i64, i64)
12 %val = load i64* getelementptr (%0* bitcast (%struct.S1* @g_10 to %0*), i32 0, i32 0) ; <i64> [#uses=1]
14 %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
15 %tmp4.i = lshr i64 %val, 32 ; <i64> [#uses=1]
16 %tmp5.i = trunc i64 %tmp4.i to i32 ; <i32> [#uses=1
[all...] |
| 2007-03-26-CoalescerBug.ll | 3 @data = external global [339 x i64]
7 %t43 = load i64* getelementptr ([339 x i64]* @data, i32 0, i64 212), align 4
22 %t1062 = shl i64 %t43, 3
23 %t1066 = shl i64 0, 3
26 %t1025 = phi i64 [ 0, %bb268 ], [ %t102.0, %bb234 ]
27 %t1028 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234 ]
28 %t1031 = phi i64 [ 0, %bb268 ], [ %t103.0, %bb234 ]
29 %t1034 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| dce-iterate.ll | 5 %sx34 = bitcast double %sx to i64 ; <i64> [#uses=1]
6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1]
7 %sy22 = bitcast double %sy to i64 ; <i64> [#uses=1]
8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1]
11 %sz10 = bitcast double %sz to i64 ; <i64> [#uses=1]
12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1]
16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1
[all...] |
| add-shrink.ll | 4 ; Should only have one sext and the add should be i32 instead of i64.
6 define i64 @test1(i32 %A) {
9 %D = sext i32 %B to i64 ; <i64> [#uses=1]
10 %E = sext i32 %C to i64 ; <i64> [#uses=1]
11 %F = add i64 %D, %E ; <i64> [#uses=1]
12 ret i64 %F
|
| /external/llvm/test/CodeGen/PowerPC/ |
| mem_update.ll | 6 @Glob = global i64 4
38 define i16* @test3a(i16* %X, i64* %dest) nounwind {
41 %B = sext i16 %A to i64
42 store i64 %B, i64* %dest
46 define i64* @test4(i64* %X, i64* %dest) nounwind {
47 %Y = getelementptr i64* %X, i32 4
48 %A = load i64* %
[all...] |
| mulhs.ll | 10 %tmp.1 = sext i32 %a to i64 ; <i64> [#uses=1]
11 %tmp.3 = sext i32 %b to i64 ; <i64> [#uses=1]
12 %tmp.4 = mul i64 %tmp.3, %tmp.1 ; <i64> [#uses=1]
13 %tmp.6 = lshr i64 %tmp.4, 32 ; <i64> [#uses=1]
14 %tmp.7 = trunc i64 %tmp.6 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/DebugInfo/ |
| 2010-03-30-InvalidDbgInfoCrash.ll | 17 !6 = metadata !{i32 524309, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ]
19 !8 = metadata !{i32 524324, metadata !4, metadata !"int", metadata !4, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
20 !9 = metadata !{i32 524303, metadata !4, metadata !"", metadata !4, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ]
21 !10 = metadata !{i32 524307, metadata !3, metadata !"", metadata !4, i32 11, i64 8, i64 8, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2011-09-28-CMovCombineBug.ll | 7 %1 = load i64* undef, align 4
9 %3 = zext i32 %2 to i64
10 %4 = and i64 %1, %3
11 %5 = lshr i64 %4, undef
12 switch i64 %5, label %8 [
13 i64 0, label %9
14 i64 1, label %6
15 i64 4, label %9
16 i64 5, label %7
|
| neon_ld2.ll | 5 define void @t1(<4 x i32>* %r, <2 x i64>* %a, <2 x i64>* %b) nounwind {
7 %0 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1]
8 %1 = load <2 x i64>* %b, align 16 ; <<2 x i64>> [#uses=1]
9 %2 = add <2 x i64> %0, %1 ; <<2 x i64>> [#uses=1]
10 %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1]
15 define <4 x i32> @t2(<2 x i64>* %a, <2 x i64>* %b) nounwind readonly
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 07-SelectCC.ll | 3 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
6 define i64 @foo(i64 %a, i64 %b) nounwind readnone {
8 %cmp = icmp ult i64 %a, %b ; <i1> [#uses=1]
9 %cond = select i1 %cmp, i64 %a, i64 %b ; <i64> [#uses=1]
10 ret i64 %cond
|
| 08-DivRem.ll | 6 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
9 define i64 @div(i64 %a, i64 %b) nounwind readnone {
11 %div = sdiv i64 %a, %b ; <i64> [#uses=1]
12 ret i64 %div
21 define i64 @div2(i64 %a, i64 %b) nounwind readnone
[all...] |
| 08-DivRemMemOp.ll | 6 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
9 define i64 @div(i64 %a, i64* %b) nounwind readnone {
11 %b1 = load i64* %b
12 %div = sdiv i64 %a, %b1
13 ret i64 %div
16 define i64 @div1(i64 %a, i64* %b) nounwind readnone
[all...] |
| /external/llvm/test/Transforms/ConstProp/ |
| bswap.ll | 9 declare i64 @llvm.bswap.i64(i64)
21 define i64 @Y() {
22 %Z = call i64 @llvm.bswap.i64( i64 1 ) ; <i64> [#uses=1]
23 ret i64 %Z
|
| /external/llvm/test/Transforms/GlobalOpt/ |
| constantfold-initializers.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
8 @A = global i1 icmp ne (i64 sub nsw (i64 ptrtoint (i8* getelementptr inbounds ([3 x i8]* @.str91250, i64 0, i64 1) to i64), i64 ptrtoint ([3 x i8]* @.str91250 to i64)), i64 1)
|
| /external/llvm/test/Analysis/BasicAA/ |
| getmodrefinfo-cs-cs.ll | 15 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false)
16 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false)
18 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwin
[all...] |
| 2003-03-04-GEPCrash.ll | 3 define void @test({[2 x i32],[2 x i32]}* %A, i64 %X, i64 %Y) {
4 %P1 = getelementptr {[2 x i32],[2 x i32]}* %A, i64 0, i32 0, i64 %X
5 %P2 = getelementptr {[2 x i32],[2 x i32]}* %A, i64 0, i32 1, i64 %Y
|
